yosys.git
2021-03-05 Dan RavensloftReplace assert in addModule with more useful error...
2021-03-05 whitequarkMerge pull request #2635 from whitequark/cxxrtl-memrd...
2021-03-05 whitequarkMerge pull request #2634 from whitequark/cxxrtl-debug...
2021-03-05 whitequarkMerge pull request #2633 from whitequark/cxxrtl-no-top
2021-03-05 whitequarkcxxrtl: follow aliases to outlines when emitting $memrd...
2021-03-05 whitequarkcxxrtl: add pass debug flag to show assigned wire types.
2021-03-05 whitequarkcxxrtl: don't crash on empty designs.
2021-03-04 Claire XenUpdate command-reference-manual.tex
2021-03-04 Claire XenUpdate README
2021-03-02 whitequarkMerge pull request #2620 from zachjs/port-int-types
2021-03-01 Zachary Snowverilog: fix sizing of ports with int types in module...
2021-03-01 Marcelina KościelnickaBump version
2021-03-01 Zachary Snowverilog: fix handling of nested ifdef directives
2021-03-01 Zachary SnowSet aside extraneous tests in simple_abc9 test suite
2021-03-01 Claire XenMerge pull request #2523 from tomverbeure/define_synthesis
2021-03-01 Claire XenMerge pull request #2524 from bkbncn/patch-1
2021-03-01 whitequarkMerge pull request #2617 from RobertBaruch/doc
2021-03-01 whitequarkMerge pull request #2615 from zachjs/genrtlil-conflict
2021-03-01 whitequarkMerge pull request #2618 from zachjs/int-types
2021-02-28 Zachary Snowsv: extended support for integer types
2021-02-27 Robert BaruchRTLIL Documentation: switch in process is optional
2021-02-27 Claire XenUpdate issue_template.md
2021-02-26 Zachary Snowgenrtlil: improve name conflict error messaging
2021-02-26 Michael SingerAdd tests for $countbits
2021-02-26 Michael SingerImplement $countones, $isunknown and $onehot{,0}
2021-02-26 Michael SingerImplement $countbits function
2021-02-26 Zachary SnowExtend simplify() recursion warning
2021-02-25 Marcelina KościelnickaBump version
2021-02-25 whitequarkMerge pull request #2554 from hzeller/master
2021-02-25 Marcelina Kościelnickabtor, smt2, smv: Add a hint on how to deal with funny...
2021-02-25 Marcelina KościelnickaFix handling of unique/unique0/priority cases in the...
2021-02-24 TimRudyExtend "delay" expressions to handle pair and triplet...
2021-02-24 whitequarkMerge pull request #2607 from zachjs/logger-error-atexit
2021-02-24 Zachary SnowFix double-free on unmatched logger error pattern
2021-02-24 Marcelina KościelnickaAdd tests for some common techmap files.
2021-02-24 Marcelina KościelnickaFix syntax error in adff2dff.v
2021-02-23 Marcelina Kościelnickafrontend: Make helper functions for printing locations.
2021-02-23 whitequarkMerge pull request #2594 from zachjs/func-arg-width
2021-02-23 Robert Baruchint -> bool
2021-02-23 Robert BaruchAdds is_wire to SigBit and SigChunk
2021-02-23 William D.... machxo2: Switch to LUT4 sim model which propagates...
2021-02-23 William D.... machxo2: Update tribuf test to reflect active-low OE.
2021-02-23 William D.... machxo2: Add experimental status to help.
2021-02-23 William D.... machxo2: Add DCCA and DCMA blackbox primitives.
2021-02-23 William D.... machxo2: Fix reversed interpretation of REG_SD config...
2021-02-23 William D.... machxo2: Tristate is active-low.
2021-02-23 William D.... machxo2: Fix typos in FACADE_FF sim model.
2021-02-23 William D.... machxo2: Fix naming of TRELLIS_IO ports to match PIO...
2021-02-23 William D.... machxo2: Improve help_mode output in synth_machxo2.
2021-02-23 William D.... machxo2: Use attrmvcp pass to move LOC and src attribut...
2021-02-23 William D.... machxo2: Add missing OSCH oscillator primitive.
2021-02-23 William D.... machxo2: Add believed-to-be-correct tribuf test.
2021-02-23 William D.... machxo2: Add passing fsm, mux, and shifter tests.
2021-02-23 William D.... machxo2: Add add_sub test. Fix tests to include FACADE_...
2021-02-23 William D.... machxo2: Add -noiopad option to synth_machxo2.
2021-02-23 William D.... machxo2: Use correct INITVAL for LUT1 in FACADE_SLICE.
2021-02-23 William D.... machxo2: Fix cells_sim typo where OFX1 was multiply...
2021-02-23 William D.... machxo2: synth_machxo2 now maps ports to FACADE_IO.
2021-02-23 William D.... machxo2: Add initial value for Q in FACADE_FF.
2021-02-23 William D.... machxo2: Add FACADE_IO simulation model. More comments...
2021-02-23 William D.... machxo2: Add FACADE_SLICE simulation model.
2021-02-23 William D.... machxo2: Improve FACADE_FF simulation model.
2021-02-23 William D.... machxo2: Improve LUT4 techmap. Use same output port...
2021-02-23 William D.... machxo2: Add dffe test.
2021-02-23 William D.... machxo2: Add dff.ys test, fix another cells_map.v typo.
2021-02-23 William D.... machxo2: Fix more oversights in machxo2 models. logic...
2021-02-23 William D.... machxo2: Add test/arch/machxo2 directory (test does...
2021-02-23 William D.... machxo2: Fix typos. test/arch/run-test.sh passes.
2021-02-23 William D.... machxo2: Create basic techlibs and synth_machxo2 pass.
2021-02-22 Karol Gugalafrontend: json: parse negative values
2021-02-22 Marcelina Kościelnickaassertpmux: Fix crash on unused $pmux output.
2021-02-21 whitequarkMerge pull request #2586 from zachjs/tern-recurse
2021-02-21 whitequarkMerge pull request #2591 from zachjs/verilog-preproc...
2021-02-21 Zachary Snowverilog: fix sizing of constant args for tasks/functions
2021-02-19 Zachary Snowverilog: error on macro invocations with missing argume...
2021-02-18 Yosys BotBump version
2021-02-17 Claire XenMerge pull request #2590 from RobertBaruch/fix_fast_sop...
2021-02-17 Robert BaruchFixes command line for abc pass in -fast -sop mode
2021-02-16 Yosys BotBump version
2021-02-15 Claire XenMerge pull request #2574 from dh73/master
2021-02-13 Yosys BotBump version
2021-02-12 Zachary Snowverilog: support recursive functions using ternary...
2021-02-12 gatecatMerge pull request #2585 from YosysHQ/dave/nexus-dotproduct
2021-02-12 Miodrag MilanovicGanulate Verific support
2021-02-12 Yosys BotBump version
2021-02-11 whitequarkMerge pull request #2573 from zachjs/repeat-call
2021-02-11 Zachary SnowMerge pull request #2578 from zachjs/genblk-port
2021-02-11 Zachary SnowMerge pull request #2584 from antmicro/atom_type_signedness
2021-02-11 Kamil RakoczyAdd missing is_signed to type_atom
2021-02-07 Zachary Snowverlog: allow shadowing module ports within generate...
2021-02-07 Yosys BotBump version
2021-02-06 whitequarkMerge pull request #2576 from zachjs/port-bind-sign...
2021-02-06 Zachary Snowgenrtlil: fix signed port connection codegen failures
2021-02-06 Yosys BotBump version
2021-02-05 whitequarkMerge pull request #2572 from antmicro/check-labels
2021-02-05 Yosys BotBump version
2021-02-04 Diego HAccept disable case for SVA liveness properties.
2021-02-04 Kamil RakoczyAdd check of begin/end labels for genblock
2021-02-04 Zachary Snowverilog: refactored constant function evaluation
2021-02-04 whitequarkMerge pull request #2529 from zachjs/unnamed-genblk
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