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yosys.git
2021-06-09
Claire Xen
Merge pull request #2817 from YosysHQ/claire/fixemails
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2021-06-09
Claire Xenia...
Fix deadname SVN links
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2021-06-09
Claire Xenia...
Intersynth URL
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2021-06-09
Claire Xenia...
More deadname stuff
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2021-06-09
Claire Xenia...
Fix icestorm links
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2021-06-09
Claire Xenia...
More deadname stuff
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2021-06-09
Claire Xenia...
Use HTTPS for website links, gatecat email
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2021-06-09
Claire Xenia...
Fix files with CRLF line endings
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2021-06-08
Zachary Snow
verilog: check for module scope identifiers during...
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2021-06-08
Zachary Snow
mem2reg: tolerate out of bounds constant accesses
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2021-06-08
Zachary Snow
autoname: simple perf optimizations
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2021-06-07
Claire Xenia...
Fixing old e-mail addresses and deadnames
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2021-06-07
Claire Xenia...
Add claire deadname stuff to .mailmap
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2021-06-01
Zachary Snow
sv: support tasks and functions within packages
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2021-06-01
Marcelina Kościelnicka
kernel/mem: Recognize some deprecated memory port configs.
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2021-05-31
Marcelina Kościelnicka
memory_map: Improve start_offset handling.
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2021-05-29
Marcelina Kościelnicka
memory_share: Add read port merging.
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2021-05-28
Marcelina Kościelnicka
memory_share: Improve sat-based port sharing.
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2021-05-27
Marcelina Kościelnicka
Make a few passes auto-call Mem::narrow instead of...
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2021-05-27
Marcelina Kościelnicka
backends/verilog: Add support for memory read port...
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2021-05-27
Marcelina Kościelnicka
backends/verilog: Add wide port support.
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2021-05-27
Marcelina Kościelnicka
memory_share: Improve same-address merging, recognize...
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2021-05-27
Marcelina Kościelnicka
kernel/mem: Add helpers for write port widening.
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2021-05-26
Marcelina Kościelnicka
kernel/mem: Add sub_addr helpers.
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2021-05-26
Marcelina Kościelnicka
kernel/mem: Add prepare_wr_merge helper.
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2021-05-25
Marcelina Kościelnicka
backends/verilog: Try to preserve mem write port priori...
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2021-05-25
Marcelina Kościelnicka
mem/extract_rdff: Fix "no FF made" edge case.
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2021-05-25
Marcelina Kościelnicka
memory_bram: Reuse extract_rdff helper for make_outreg.
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2021-05-25
Zachary Snow
verilog: fix case expression sign and width handling
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2021-05-25
Zachary Snow
sv: support remaining assignment operators
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2021-05-25
Marcelina Kościelnicka
mem/extract_rdff: Add alternate transparency handling.
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2021-05-25
Marcelina Kościelnicka
opt_mem: Add reset/init value support.
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2021-05-25
Marcelina Kościelnicka
kernel/mem: Add model support for read port init value...
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2021-05-25
Marcelina Kościelnicka
mem/extract_rdff: Fix wire naming and wide port support.
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2021-05-25
Marcelina Kościelnicka
memory_bram: Respect write port priority.
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2021-05-25
Marcelina Kościelnicka
opt_mem_feedback: Respect write port priority.
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2021-05-25
Marcelina Kościelnicka
kernel/mem: Add emulate_priority helper.
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2021-05-25
Marcelina Kościelnicka
Add memory_narrow pass.
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2021-05-25
Marcelina Kościelnicka
memory_share: Add wide port support.
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2021-05-25
Marcelina Kościelnicka
opt_mem_feedback: Add wide port support.
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2021-05-25
Marcelina Kościelnicka
memory_map: Add wide port support.
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2021-05-25
Marcelina Kościelnicka
sim: Add wide port support.
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2021-05-25
Marcelina Kościelnicka
Reject wide ports in some passes that will never suppor...
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2021-05-25
Marcelina Kościelnicka
kernel/mem: Add a Mem::narrow helper to split up wide...
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2021-05-25
Marcelina Kościelnicka
kernel/mem: Emit support for wide ports in packed mode.
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2021-05-25
Marcelina Kościelnicka
kernel/mem: Add model for wide ports.
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2021-05-24
Marcelina Kościelnicka
kernel/mem: Add priority_mask to model.
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2021-05-24
Marcelina Kościelnicka
opt_mem_feedback: Rewrite feedback path finding logic.
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2021-05-24
Marcelina Kościelnicka
opt_mem_feedback: Convert to Mem helpers.
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2021-05-24
Marcelina Kościelnicka
hashlib: Add a hash for bool.
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2021-05-24
Marcelina Kościelnicka
Add a .mailmap file.
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2021-05-24
Miodrag Milanović
Merge pull request #2779 from YosysHQ/mwk/nuke-travis
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2021-05-24
Marcelina Kościelnicka
Remove Travis CI.
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2021-05-24
Marcelina Kościelnicka
backend/firrtl: Convert to use Mem helpers.
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2021-05-24
Marcelina Kościelnicka
github actions: Test on several gcc and clang versions...
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2021-05-23
Marcelina Kościelnicka
memory_share: Use Mem helpers.
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2021-05-23
Marcelina Kościelnicka
extract_rdff: Add initvals parameter.
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2021-05-23
Marcelina Kościelnicka
btor: Use is_mem_cell in one more place.
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2021-05-23
Marcelina Kościelnicka
memory_share: Split off feedback path finding as a...
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2021-05-23
Marcelina Kościelnicka
Add new helper class for merging FFs into cells, use...
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2021-05-23
Marcelina Kościelnicka
opt_mem: Remove write ports with const-0 EN.
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2021-05-22
Marcelina Kościelnicka
memory_memx: Use Mem helper.
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2021-05-22
Marcelina Kościelnicka
kernel/rtlil: Extract some helpers for checking memory...
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2021-05-22
Marcelina Kościelnicka
kernel/mem: Add a check() function.
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2021-05-22
Marcelina Kościelnicka
kernel/mem: defer port removal to emit()
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2021-05-21
Marcelina Kościelnicka
memory_dff: Use Mem helper.
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2021-05-20
Miodrag Milanović
Run VS build on PRs and each push
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2021-05-20
Marcelina Kościelnicka
Bump version
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2021-05-20
Marcelina Kościelnicka
tests/blif: Add missing gitignore
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2021-05-17
Miodrag Milanovic
Visual Studio build action
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2021-05-15
gatecat
intel_alm: Fix illegal carry chains
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2021-05-15
gatecat
intel_alm: Add global buffer insertion
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2021-05-15
gatecat
intel_alm: Add IO buffer insertion
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2021-05-14
Rupert Swarbrick
Change the type of current_module to Module
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2021-05-14
Rupert Swarbrick
Use range-based for loop in AST::process
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2021-05-12
Adam Greig
Add missing parameters for MULT18X18D and ALU54B to...
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2021-05-10
Zachary Snow
sv: check validity of package end label
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2021-05-08
Marcelina Kościelnicka
blif: Use library cells' start_offset and upto for...
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2021-05-08
Marcelina Kościelnicka
connect: Add -assert option, fix non-working sigmap.
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2021-05-04
Marcelina Kościelnicka
opt_dff: Fix NOT gates wired in reverse.
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2021-04-27
Miodrag Milanović
Merge pull request #2738 from mdko/xilinx-blif
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2021-04-27
Michael Christensen
Fix use of blif name in synth_xilinx command
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2021-04-26
Claire Xen
Merge pull request #2737 from YosysHQ/claire/fix2736
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2021-04-26
Claire Xenia...
Remove duplicates from conns array in JSON front-end...
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2021-04-21
Claire Xen
Merge pull request #2669 from YosysHQ/claire/ice40defaults
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2021-04-20
Claire Xenia...
Add default assignments to other SB_* simulation models
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2021-04-20
Claire Xenia...
Add default assignments to SB_LUT4
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2021-04-17
Lofty
quicklogic: ABC9 synthesis
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2021-04-09
Stefan Riesenberger
sf2: fix name of AND modules
ls180
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2021-04-09
whitequark
Merge pull request #2724 from whitequark/flatten-rewrit...
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2021-04-09
whitequark
flatten: rewrite memid in memwr actions.
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2021-03-30
Zachary Snow
preproc: test coverage for #2712
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2021-03-30
Marcelina Kościelnicka
equiv: Suggest running async2sync or clk2fflogic where...
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2021-03-30
Zachary Snow
verilog: revise hot comment warnings
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2021-03-30
Eddie Hung
abc9: uniquify blackboxes like whiteboxes (#2695)
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2021-03-30
Eddie Hung
abc9: fix SCC issues (#2694)
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2021-03-30
Marcelina Kościelnicka
Bump version
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2021-03-30
Marcelina Kościelnicka
preproc: Fix up conditional handling.
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2021-03-29
Zachary Snow
gha: trim macOS dependencies
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2021-03-28
Zachary Snow
gha: combine jobs using matrix
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