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yosys.git
2013-05-23
Clifford Wolf
Fixed a gcc vs. clang determinism problem in abc pass
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2013-05-23
Clifford Wolf
Fixed memory corruption bug in opt_rmunused
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2013-05-23
Clifford Wolf
Only initialize TCL interpreter when needed
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2013-05-23
Clifford Wolf
Fixed memory leak in ilang frontend
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2013-05-23
Clifford Wolf
Added missing newline to some error messages
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2013-05-23
Clifford Wolf
Added labels to "help -write-tex-command-reference...
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2013-05-23
Clifford Wolf
Added support for processes to show command
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2013-05-23
Clifford Wolf
Fixed show command for constant assignments
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2013-05-23
Clifford Wolf
Some improvements in opt_rmdff
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2013-05-19
Clifford Wolf
Merge pull request #6 from hansiglaser/master
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2013-05-19
Johann Glaser
added option '-Dname[=definition]' to command 'read_ver...
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2013-05-17
Clifford Wolf
Removed test cases that have been moved to yosys-test.
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2013-05-17
Clifford Wolf
Fixed to aggressive x-folding in opt_const
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2013-05-16
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2013-05-16
Clifford Wolf
Merge branch 'bugfix'
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2013-05-16
Clifford Wolf
Fixed synthesis of functions in latched blocks
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2013-05-14
Clifford Wolf
Improved vcdcd.pl (added -d option)
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2013-05-14
Clifford Wolf
Some improvements in vcdcd.pl
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2013-05-07
Clifford Wolf
Added support for verilog === operator
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2013-05-02
Clifford Wolf
Added tcl "yosys -import" command
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2013-05-01
Clifford Wolf
Improved/simplified TCL bindings
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2013-04-27
Clifford Wolf
Added support for const cell inputs in techmap
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2013-04-27
Clifford Wolf
Fixed README for new show command behavior (svg vs...
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2013-04-26
Clifford Wolf
Added "flatten" pass
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2013-04-26
Clifford Wolf
Fixed handling of positional module parameters
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2013-04-26
Clifford Wolf
Fixed hierarchy pass for hierarchies of parametric...
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2013-04-26
Clifford Wolf
Only use sha1 checksums for names of parametric modules...
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2013-04-15
Clifford Wolf
Fixed "show -format ..." command line parsing
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2013-04-15
Clifford Wolf
Added "submod -name ..." support
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2013-04-13
Clifford Wolf
Fixed a bug in AST frontend for cases with non-blocking...
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2013-04-13
Clifford Wolf
Fixed a bug in opt_const when optimizing 1-bit compares...
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2013-04-07
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2013-04-07
Clifford Wolf
Fixed clock related parameter names for $memrd and...
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2013-04-05
Clifford Wolf
Merge pull request #5 from hansiglaser/master
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2013-04-05
Johann Glaser
fsm_export: optionally use binary state encoding as...
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2013-04-05
Clifford Wolf
Merge pull request #4 from hansiglaser/master
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2013-04-05
Johann Glaser
fsm_export: specify KISS filename on command line
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2013-04-01
Clifford Wolf
Fixed/improved handling of colored wires in show command
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2013-04-01
Clifford Wolf
Added support for @<set-name> in expand select ops...
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2013-04-01
Clifford Wolf
Removed 4096 bytes limit for size of command from scrip...
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2013-04-01
Clifford Wolf
Added -color <color> <selection> option to show command
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2013-03-31
Clifford Wolf
Fixed "select" for "%%" stmt with emty stack
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2013-03-31
Clifford Wolf
Added "script" command
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2013-03-31
Clifford Wolf
Now only use value from "initial" when no matching...
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2013-03-31
Clifford Wolf
Added AST_INITIAL (before verilog "initial" was mapped...
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2013-03-31
Clifford Wolf
Added test cases from 2012 paper on comparison of foss...
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2013-03-31
Clifford Wolf
Added k68 (m68k compatible cpu) test case from verilator
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2013-03-29
Clifford Wolf
Improved opt_share for reduce cells
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2013-03-29
Clifford Wolf
Improved opt_share for commutative standard cells
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2013-03-28
Clifford Wolf
Added EXTRA_TARGETS Makefile variable
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2013-03-28
Clifford Wolf
Improved Makefile: Added ENABLE_* switches
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2013-03-28
Clifford Wolf
Implemented TCL support (only via -c option at the...
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2013-03-28
Clifford Wolf
Improved subcircuit verbose output (added portmapper...
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2013-03-28
Clifford Wolf
Fixed svgviewer hacks for builtin files
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2013-03-28
Clifford Wolf
Added proper TECHMAP_FAIL support and added support...
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2013-03-28
Clifford Wolf
Implemented proper handling of stub placeholder modules
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2013-03-27
Clifford Wolf
Keep viewport transform stable on reload in yosys-svgviewer
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2013-03-27
Clifford Wolf
Added check: only one module for "show" unless format...
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2013-03-27
Clifford Wolf
Now using SVG and yosys-svgviewer per default in show...
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2013-03-27
Clifford Wolf
Added yosys-svgviewer to build system and renamed filte...
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2013-03-27
Clifford Wolf
Imported svgviewer from qt4.8
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2013-03-26
Clifford Wolf
Create nice errors when calling RTLIL::Module::derive...
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2013-03-26
Clifford Wolf
Collect parameters in hierarchy -generate (and do nothi...
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2013-03-26
Clifford Wolf
Tiny bugfix in simlib.v
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2013-03-26
Clifford Wolf
Improvements and bugfixes for generate blocks with...
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2013-03-26
Clifford Wolf
Fixed handling of unconditional generate blocks
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2013-03-25
Clifford Wolf
Added nosync attribute and some async reset related...
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2013-03-25
Clifford Wolf
Improved verbose output of subcircuit
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2013-03-25
Clifford Wolf
Improved method for finding fsm_expand candidates
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2013-03-25
Clifford Wolf
Added hierarchy -generate command for generating skelet...
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2013-03-24
Clifford Wolf
Changed fsm_expand to merge multiplexers more aggressively
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2013-03-24
Clifford Wolf
Renamed hansimem.v test case to mem_arst.v
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2013-03-24
Clifford Wolf
Fixed handling of show -viewer
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2013-03-24
Clifford Wolf
Fixed handling of internal signals in show command
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2013-03-24
Clifford Wolf
Improved show -colors color assignments
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2013-03-24
Clifford Wolf
Added show -strech and renamed -widthlabels to -width
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2013-03-24
Clifford Wolf
Added -widthlabels options to chow command
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2013-03-24
Clifford Wolf
Added -notypes option to intersynth backend
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2013-03-24
Clifford Wolf
Reorganized TODOs
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2013-03-24
Clifford Wolf
Added mem2reg option to verilog frontend
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2013-03-24
Clifford Wolf
Fixed stdcells.v for $adff with undef reset value
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2013-03-24
Clifford Wolf
Another fix in mem2reg ast simplify logic
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2013-03-24
Clifford Wolf
Added -colors option to show command
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2013-03-24
Clifford Wolf
Added hansimem testcase (memory with async reset)
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2013-03-24
Clifford Wolf
Improved mem2reg handling in ast simplifier
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2013-03-23
Clifford Wolf
Fixed gcc build (intersynth backend)
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2013-03-23
Clifford Wolf
Tiny fixes to verilog parser
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2013-03-23
Clifford Wolf
Various improvements in intersynth backend
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2013-03-23
Clifford Wolf
Added intersynth backend
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2013-03-21
Clifford Wolf
Added help -write-tex-command-reference-manual option
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2013-03-21
Clifford Wolf
Added eclipse CDT project files to .gitignore
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2013-03-21
Clifford Wolf
Added -S option for simple synthesis to gate logic
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2013-03-21
Clifford Wolf
Avoid verilog-2k in verilog backend
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2013-03-21
Clifford Wolf
Disabled the per-default dumping of ILANG code
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2013-03-21
Clifford Wolf
Added -nomap option to memory pass
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2013-03-19
Clifford Wolf
Merge branch 'hansiglaser-master'
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2013-03-19
Clifford Wolf
added optimizations for single-bit $eq/$ne with constan...
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2013-03-19
Clifford Wolf
improved $mux optimization in opt_const
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2013-03-19
Clifford Wolf
keep $mux and $_MUX_ optimizations separate in opt_const
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2013-03-18
Johann Glaser
added a TODO
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