microwatt.git
2022-08-09 Paul Mackerraspredecode: Add more comments to row_predecode_rom and...
2022-08-09 Paul Mackerrasicache: Log 36 bits of instruction rather than 32
2022-08-09 Paul Mackerraspredecode: Work around apparent yosys/nextpnr bug
2022-08-09 Paul MackerrasPre-decode instructions when writing them to icache
2022-08-09 Paul MackerrasEliminate use of primary opcode outside of decode1
2022-08-09 Paul Mackerrasdecode1: Divide insn_code values into ranges to indicat...
2022-08-09 Paul Mackerrasdecode1: Split instruction decoding into two steps
2022-08-09 Paul Mackerrasdecode1: Use block RAMs in decode
2022-08-09 Paul Mackerrasdecode2: Decode unit and single-pipe attributes for...
2022-08-09 Paul MackerrasFPU: Set sign of 0 result of subtraction in pack_dp
2022-08-09 Paul MackerrasFPU: Simplify IDLE state code
2022-08-09 Paul MackerrasFPU: Make an explicit exponent data path
2022-08-09 Paul MackerrasFPU: Minor fix and simplifications
2022-08-09 Paul Mackerrasloadstore1: Simplify address generation in OP_FETCH_FAI...
2022-08-09 Paul MackerrasRemove leftover logic for 16-byte loads and stores
2022-08-09 Paul Mackerraswriteback: Eliminate unintentional inferred latch
2022-08-09 Michael NeulingMerge pull request #390 from shenki/fix-whide-warnings
2022-08-09 Anton BlanchardMerge pull request #389 from paulusmack/fix-sc
2022-08-09 Paul Mackerrasexecute1: Fix trace interrupt on sc instruction
2022-08-08 Joel Stanleysoc: Fix -Whide warning
2022-08-08 Joel Stanleyxics: Fix -Whide warnings
2022-08-08 Joel Stanleyfpu: Fix -Whide warnings
2022-08-08 Michael NeulingMerge pull request #387 from antonblanchard/gitignore
2022-08-07 Anton BlanchardAdd litesdcard/build to gitignore
2022-08-05 Paul MackerrasMerge pull request #384 from antonblanchard/litedram...
2022-08-04 Anton Blanchardlitedram: Regenerate
2022-08-04 Anton Blanchardlitedram: MIGEN_GIT_SHA1 no longer defined
2022-08-04 Paul MackerrasMerge pull request #383 from antonblanchard/fix-sdcard
2022-08-04 Anton Blanchardlitesdcard: Fix and regenerate Verilog
2022-08-01 Paul MackerrasMerge pull request #381 from shingarov/gitignore-artifacts
2022-08-01 Paul MackerrasMerge pull request #378 from mikey/ux-cleanup
2022-07-29 Boris ShingarovGitignore build artifacts
2022-07-28 Michael Neulingtest: Add test for metavalues
2022-07-28 Michael Neulingtests: Update FPU test output
2022-07-28 Michael Neulingtests: Minor script cleanups
2022-07-28 Michael NeulingMetavalue cleanup for register_file.vhdl
2022-07-28 Michael NeulingMetavalue cleanup for pmu.vhdl
2022-07-28 Michael NeulingMetavalue cleanup for rotator.vhdl
2022-07-28 Michael NeulingMetavalue cleanup for mmu.vhdl
2022-07-28 Michael NeulingMetavalue cleanup for loadstore1.vhdl
2022-07-28 Michael NeulingMetavalue cleanup for icache.vhdl
2022-07-28 Michael NeulingMetavalue cleanup for fpu.vhdl
2022-07-28 Michael NeulingMetavalue cleanup for fetch1.vhdl
2022-07-28 Michael NeulingMetavalue cleanup for execute1.vhdl
2022-07-28 Michael NeulingMetavalue cleanup for decoder1.vhdl
2022-07-28 Michael NeulingMetavalue cleanup for helpers.vhdl
2022-07-28 Michael NeulingMetavalue cleanup for common.vhdl
2022-07-26 Michael NeulingMerge pull request #379 from paulusmack/master
2022-07-25 Michael NeulingMerge pull request #380 from iagocaran/master
2022-07-25 Michael Neulingtests/pmu: Cleanup whitespace in pmc.c
2022-07-22 Paul MackerrasUse register addresses from decode1 for dependency...
2022-07-22 Paul Mackerrasregister_file: Make read access to register file synchr...
2022-07-22 Paul Mackerrasdecode1: Work out register addresses in decode1
2022-07-22 Paul Mackerrasloadstore1: Do SPR reading in stage 2 rather than stage 3
2022-07-22 Paul MackerrasProvide debug access to SPRs in loadstore1 and mmu
2022-07-22 Paul MackerrasRestore debug access to SPRs
2022-07-22 Paul MackerrasFinish off taking SPRs out of register file
2022-07-22 Paul MackerrasMove LR, CTR and TAR out of the register file
2022-07-22 Paul MackerrasStart removing SPRs from register file
2022-07-22 Paul MackerrasUse FPU for division instructions if we have an FPU
2022-07-22 Paul MackerrasFPU: Add logic for 32-bit integer division
2022-07-22 Paul MackerrasFPU: Add integer division logic to FPU
2022-07-22 Paul MackerrasFPU: Convert internal R, A, B, and C registers to 8...
2022-07-22 Paul MackerrasTrack hazards explicitly for XER overflow bits
2022-07-22 Paul Mackerrasfetch1: Fix debug stop again
2022-07-22 Paul Mackerrascontrol: Reimplement serialization using tags
2022-07-22 Paul Mackerrasdecode1: Remove stash buffer
2022-07-22 Paul Mackerrasdecode2: Rework to make the stall_out signal come from...
2022-07-22 Paul MackerrasRemove support for lq, stq, lqarx and stqcx.
2022-07-22 Paul Mackerrasdecode2: Rename 'r' to 'dc2'
2022-07-22 Paul Mackerrasdecode1: Reduce number of single-issue instructions
2022-07-22 Paul MackerrasFPU: Add stage-2 stall ability to FPU
2022-07-22 Paul MackerrasDo CR0 setting for Rc=1 instructions in execute2 instea...
2022-07-22 Paul MackerrasAllow integer instructions and load/store instructions...
2022-07-22 Paul MackerrasAdd a bypass path from the execute2 stage
2022-07-22 Paul MackerrasAdd a second execute stage to the pipeline
2022-07-22 Paul Mackerrasexecute1: Rename 'r' to 'ex1'
2022-07-22 Paul Mackerrasexecute1: Restructure to separate out execution of...
2022-07-19 Iago Caran... tests/pmu: Add load/store completed, instruction count...
2022-06-29 Paul MackerrasMove XER low bits out of register file
2022-06-29 Paul MackerrasSimplify flow control in the dcache and loadstore units
2022-06-16 Paul MackerrasMerge pull request #353 from tianrui-wei/master
2022-06-16 Michael NeulingMerge pull request #373 from antonblanchard/icache...
2022-06-16 Michael NeulingMerge pull request #376 from antonblanchard/loadstore...
2022-06-16 Michael NeulingMerge pull request #374 from antonblanchard/icache...
2022-06-16 Michael NeulingMerge pull request #364 from shenki/readme-updates
2022-06-16 Michael NeulingMerge pull request #372 from antonblanchard/dcache...
2022-06-16 Michael NeulingMerge pull request #371 from antonblanchard/unused-sig
2022-06-16 Michael NeulingMerge pull request #370 from antonblanchard/divider...
2022-06-15 Paul MackerrasMerge pull request #368 from antonblanchard/icache...
2022-06-14 Anton BlanchardMerge pull request #377 from antonblanchard/fpu-init
2022-06-14 Anton Blanchardfpu: Reduce uninitialised signals
2022-06-14 Michael NeulingMerge pull request #366 from antonblanchard/hello-world-bss
2022-06-12 Anton BlanchardMerge pull request #375 from antonblanchard/core_debug...
2022-06-12 Anton Blanchardloadstore1: reduce U state being output
2022-06-12 Anton Blanchardcore_debug: Initialise gspr_index
2022-06-12 Anton Blanchardcore: Remove unused icache_inv signal
2022-06-12 Anton Blanchardicache: Don't output X on i_out.insn
2022-06-12 Anton Blancharddcache: remove unused do_write signal
2022-06-12 Anton Blanchardexecute1: sub_mux_sel and result_mux_sel are unused
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