litex.git
2012-05-01 Sebastien Bourdeauducqtb/asmicon_wb: better access pattern
2012-04-26 Sebastien Bourdeauducqtb/asmicon_wb: test asmicon with wishbone bridge
2012-04-26 Sebastien Bourdeauducqtb/asmicon: do not keep files
2012-04-02 Sebastien BourdeauducqRemove uses of pads, new constraints system
2012-04-01 Sebastien Bourdeauducqasmicon: various fixes. Now produces convincing refresh...
2012-04-01 Sebastien Bourdeauducqtb/asmicon: global test bench
2012-03-31 Sebastien Bourdeauducqtb/asmicon: bankmachine test bench
2012-03-31 Sebastien Bourdeauducqtb/asmicon/bankmachine: test buffer and NACK
2012-03-31 Sebastien Bourdeauducqtb/asmicon/bankmachine: selector test bench
2012-03-31 Sebastien Bourdeauducqasmicon/bankmachine: fixes
2012-03-30 Sebastien Bourdeauducqtb: remove obsolete norflash test bench
2012-03-30 Sebastien Bourdeauducqtb/asmicon: refresher test
2012-03-30 Sebastien Bourdeauducqasmicon/refresher: fix refresh sequence done signal
2012-03-21 Sebastien Bourdeauducqtools: new flterm
2012-03-18 Sebastien Bourdeauducqasmicon: multiplexer (untested)
2012-03-18 Sebastien Bourdeauducqasmicon: move slot time to timing settings
2012-03-17 Sebastien Bourdeauducqasmicon: bank machine (untested)
2012-03-15 Sebastien Bourdeauducqasmicon: refresher (untested)
2012-03-15 Sebastien Bourdeauducqnorflash: use new timeline API
2012-03-14 Sebastien Bourdeauducqasmicon: skeleton
2012-02-24 Sebastien Bourdeauducqddrphy: working on hardware, simulation a bit messed up
2012-02-24 Sebastien Bourdeauducqddrphy: request wrdata_en/rddata_en at the same time...
2012-02-24 Sebastien Bourdeauducqddrphy: reads OK, write data coming out 1/2 cycle too...
2012-02-24 Sebastien Bourdeauducqddrphy: partly working
2012-02-23 Sebastien Bourdeauducqdfii: set data mask
2012-02-23 Sebastien Bourdeauducqdfii: new design
2012-02-21 Sebastien Bourdeauducqs6ddrphy: read path OK in simulation
2012-02-20 Sebastien Bourdeauducqs6ddrphy: write path OK in simulation
2012-02-20 Sebastien Bourdeauducqs6ddrphy: generate DQ/DQS/DM OE
2012-02-20 Sebastien Bourdeauducqs6ddrphy: DQ/DQS/DM SERDES
2012-02-19 Sebastien Bourdeauducqs6ddrphy: clock, address and command
2012-02-19 Sebastien BourdeauducqPrepare for new DDR PHY
2012-02-18 Sebastien Bourdeauducqbios: fix function prototypes
2012-02-18 Sebastien BourdeauducqSend SDRAM initialization sequence and answer PHY read...
2012-02-17 Sebastien BourdeauducqDFI injector (untested)
2012-02-17 Sebastien Bourdeauducqbios: DDR initialization skeleton
2012-02-17 Sebastien Bourdeauducqbios: add flash target using m1nor
2012-02-17 Sebastien BourdeauducqAdd build Makefile and JTAG load script
2012-02-17 Sebastien BourdeauducqMap DDR PHY controls in CSR
2012-02-17 Sebastien BourdeauducqConnect DDR PHY
2012-02-17 Sebastien Bourdeauducqs6ddrphy: use single-ended DQS
2012-02-16 Sebastien Bourdeauducqclkfx: remove
2012-02-16 Sebastien Bourdeauducqm1crg: make clock feedback pin bidirectional
2012-02-16 Sebastien Bourdeauducqlm32: compatibility with the new instance API
2012-02-16 Sebastien BourdeauducqGenerate all clocks for the DDR PHY
2012-02-15 Sebastien BourdeauducqUse new bus API
2012-02-14 Sebastien Bourdeauducqs6ddrphy: prepare quilt
2012-02-14 Sebastien BourdeauducqREADME
2012-02-14 Sebastien BourdeauducqUse double quotes for all strings
2012-02-13 Sebastien BourdeauducqInclude Wishbone to ASMI bridge
2012-02-08 Sebastien Bourdeauducqtools: use install and /usr/local (as suggested by...
2012-02-08 Sebastien Bourdeauducqtools: remove bin2hex
2012-02-07 Sebastien Bourdeauducqlibbase: blocking UART write if IRQs are enabled
2012-02-07 Sebastien Bourdeauducqsoftware: shell from original BIOS
2012-02-07 Sebastien Bourdeauducqsoftware: UART RX demo
2012-02-07 Sebastien Bourdeauducquart: RX support
2012-02-07 Sebastien Bourdeauducqsoftware: enable -Wmissing-prototypes
2012-02-07 Sebastien Bourdeauducqsoftware: use the Clang/LLVM compiler
2012-02-07 Sebastien Bourdeauducqsoftware: fix size_t and ptrdiff_t
2012-02-06 Sebastien Bourdeauducqsoftware: remove unnecessary IRQ acks
2012-02-06 Sebastien BourdeauducqLM32: make IP read-only and interrupt lines level-sensitive
2012-02-06 Sebastien Bourdeauducqsoftware: interrupt driven UART working
2012-02-06 Sebastien Bourdeauducqsram: fix sub-word write
2012-02-06 Sebastien Bourdeauducqsoftware: use new UART
2012-02-06 Sebastien Bourdeauducqtop: connect UART IRQ
2012-02-06 Sebastien BourdeauducqUART: use new bank API and event manager
2012-02-05 Sebastien BourdeauducqBIOS: hello world
2012-02-05 Sebastien BourdeauducqUpdate gitignore
2012-02-05 Sebastien BourdeauducqMemory map
2012-02-05 Sebastien BourdeauducqAdd tools
2012-02-05 Sebastien Bourdeauducqflash: remove splash screens
2012-02-03 Sebastien Bourdeauducqsoftware: dependencies the Werner way
2012-02-03 Sebastien BourdeauducqCopy some software code from the original Milkymist...
2012-02-03 Sebastien Bourdeauducqsram: fix WE signal
2012-01-27 Sebastien BourdeauducqRemove explicit bus names
2012-01-27 Sebastien BourdeauducqAdd on-chip SRAM
2012-01-21 Sebastien BourdeauducqUse meaningful class names
2012-01-20 Sebastien BourdeauducqUse new verilog.convert API
2012-01-13 Sebastien BourdeauducqWishbone: omit fixed LSBs
2012-01-13 Sebastien Bourdeauducqconvtools -> tools
2012-01-05 Sebastien BourdeauducqConvert -> convert
2011-12-18 Sebastien BourdeauducqUse new syntax
2011-12-17 Sebastien Bourdeauducquart: new design using FHDL and bank (TX only, incomplete)
2011-12-17 Sebastien Bourdeauducq32-device, 8-bit CSR bus
2011-12-17 Sebastien Bourdeauducqnorflash tb: use get_fragment
2011-12-17 Sebastien BourdeauducqMultiply system clock
2011-12-17 Sebastien Bourdeauducqclkfx module
2011-12-16 Sebastien BourdeauducqProper reset generation
2011-12-16 Sebastien BourdeauducqSupport the new FHDL syntax
2011-12-16 Sebastien BourdeauducqPay a bit more attention to PEP8
2011-12-13 Sebastien BourdeauducqInitial import