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yosys.git
2020-02-02
David Shah
hierarchy: Resolve SV wildcard port connections
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2020-02-02
David Shah
sv: Add lexing and parsing of .* (wildcard port conns)
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2020-02-02
David Shah
Merge pull request #1647 from YosysHQ/dave/sprintf
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2020-02-02
David Shah
Merge pull request #1657 from YosysHQ/dave/xilinx-dsp...
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2020-02-02
Marcin Kościelnicki
xilinx: use RAM32M/RAM64M for memories with two read...
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2020-02-01
David Shah
xilinx_dsp: Add multonly scratchpad var to bypass
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2020-02-01
Marcin Kościelnicki
json: remove the 32-bit parameter special case
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2020-01-31
Eddie Hung
Merge pull request #1668 from gsomlo/gls-abc9-external
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2020-01-30
Gabriel Somlo
abc9: restore ability to use ABCEXTERNAL
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2020-01-30
Claire Wolf
Merge pull request #1667 from YosysHQ/clifford/verificnand
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2020-01-30
Claire Wolf
Merge pull request #1503 from YosysHQ/eddie/verific_help
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2020-01-30
Claire Wolf
Merge pull request #1654 from YosysHQ/eddie/sby_fix69
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2020-01-30
Claire Wolf
Add Verific support for OPER_REDUCE_NAND
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2020-01-29
Claire Wolf
Merge branch 'vector_fix' of https://github.com/Kmanfi...
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2020-01-29
Claire Wolf
Merge pull request #1662 from YosysHQ/dave/opt-reduce...
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2020-01-29
Claire Wolf
Merge pull request #1665 from YosysHQ/clifford/edifkeep
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2020-01-29
Claire Wolf
Merge pull request #1659 from YosysHQ/clifford/experimental
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2020-01-29
N. Engelhardt
Merge pull request #1510 from pumbor/master
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2020-01-29
Claire Wolf
Preserve wires with keep attribute in EDIF back-end
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2020-01-29
Miodrag Milanović
Merge pull request #1559 from YosysHQ/efinix_test_fix
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2020-01-29
Eddie Hung
Add "help -all" and "help -celltypes" sanity test
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2020-01-29
Eddie Hung
synth_xilinx: cleanup help
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2020-01-29
Eddie Hung
synth_xilinx: fix help when no active_design; fixes...
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2020-01-29
Marcin Kościelnicki
xilinx: Add simulation model for DSP48 (Virtex 4).
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2020-01-28
Eddie Hung
Merge pull request #1660 from YosysHQ/eddie/abc9_unperm...
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2020-01-28
Eddie Hung
Add and use SigSpec::reverse()
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2020-01-28
Eddie Hung
Fix unresolved conflict from #1573
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2020-01-28
Miodrag Milanovic
Updated test to use assert-max
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2020-01-28
Claire Wolf
Improve logging use of experimental features
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2020-01-28
Claire Wolf
Merge pull request #1567 from YosysHQ/eddie/sat_init_wa...
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2020-01-28
N. Engelhardt
Merge pull request #1573 from YosysHQ/eddie/xilinx_tristate
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2020-01-28
David Shah
opt_reduce: Call check() per run rather than per optimi...
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2020-01-28
Pepijn de Vos
redirect fuser stderr to /dev/null
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2020-01-28
Claire Wolf
Merge pull request #1553 from whitequark/manual-dffx
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2020-01-27
Eddie Hung
Fix $lut input ordering -- SigSpec(std::initializer_lis...
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2020-01-27
Eddie Hung
Import tests from #1628
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2020-01-27
Eddie Hung
xilinx/ice40/ecp5: undo permuting LUT masks in lut_map
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2020-01-27
Eddie Hung
Merge pull request #1619 from YosysHQ/eddie/abc9_refactor
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2020-01-27
Eddie Hung
abc9_ops: add comments
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2020-01-27
Eddie Hung
Merge remote-tracking branch 'origin/master' into eddie...
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2020-01-27
Eddie Hung
verific: no help() when no YOSYS_ENABLE_VERIFIC
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2020-01-27
Eddie Hung
verific: also unflatten for 'hierarchy' flow as per...
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2020-01-27
Eddie Hung
Merge pull request #1656 from YosysHQ/eddie/ice40_abc9_...
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2020-01-27
Claire Wolf
Add log_experimental() and experimental() API and ...
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2020-01-27
Claire Wolf
Merge pull request #1658 from YosysHQ/clifford/smtbmcso...
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2020-01-27
Claire Wolf
Improve yosys-smtbmc "solver not found" handling
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2020-01-27
Claire Wolf
Merge pull request #1613 from porglezomp-misc/version...
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2020-01-24
Eddie Hung
read_aiger: set abc9_box_seq attr
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2020-01-24
Eddie Hung
ice40: add SB_SPRAM256KA arrival time
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2020-01-24
Eddie Hung
ice40: reduce ABC9 internal fanout warnings with a...
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2020-01-24
Eddie Hung
verific: unflatten struct ports
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2020-01-24
Eddie Hung
abc9: -reintegrate recover type from existing cell...
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2020-01-24
Eddie Hung
simple_abc9 tests to discard whitebox before write...
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2020-01-24
Eddie Hung
simple_abc9 tests to discard whitebox before write...
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2020-01-24
Eddie Hung
abc_box_id -> abc9_box_id in test
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2020-01-24
Eddie Hung
abc9: warning message if no modules selected
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2020-01-24
Eddie Hung
Fix $__ABC9_ASYNC1 to output 1'b1 not 1'b0
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2020-01-24
Eddie Hung
Test for (* keep *)-ed abc9_box_id
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2020-01-24
Eddie Hung
abc9_ops: -prep_xaiger to skip (* keep *) cells
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2020-01-24
Eddie Hung
abc_box_id -> abc9_box_id in test
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2020-01-23
Eddie Hung
abc9_ops -prep_dff: insert async s/r mux in holes when...
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2020-01-23
Eddie Hung
alumacc: undo accidental commit
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2020-01-22
Eddie Hung
Fix $__ABC9_ASYNC1 to output 1'b1 not 1'b0
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2020-01-22
Eddie Hung
read_aiger: also parse abc9_mergeability
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2020-01-22
Eddie Hung
Merge remote-tracking branch 'origin/eddie/abc9_fixes...
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2020-01-22
Eddie Hung
Merge pull request #1652 from YosysHQ/eddie/abc9_fixes
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2020-01-22
Eddie Hung
abc9: error out if flip-flop init is 1'b1 for '-dff'
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2020-01-22
Eddie Hung
abc9: fix scratchpad entry abc9.verify
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2020-01-22
Eddie Hung
Merge remote-tracking branch 'origin/master' into eddie...
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2020-01-21
Eddie Hung
read_aiger: discard LUT inputs with nodeID == 0; not < 2
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2020-01-21
Eddie Hung
read_aiger: ignore constant inputs on LUTs
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2020-01-21
Eddie Hung
write_xaiger: fix for (* keep *) on flop output
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2020-01-21
Claire Wolf
Merge pull request #1637 from YosysHQ/mwk/fix-1634
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2020-01-21
Claire Wolf
Merge pull request #1629 from YosysHQ/mwk/edif-z
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2020-01-20
Claire Wolf
Merge pull request #1621 from YosysHQ/clifford/fminit
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2020-01-19
David Shah
ast: Add support for $sformatf system function
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2020-01-18
Eddie Hung
Merge pull request #1643 from YosysHQ/eddie/cleanup_ari...
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2020-01-18
David Shah
Merge pull request #1602 from niklasnisbeth/ice40-init...
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2020-01-18
Eddie Hung
Merge pull request #1645 from YosysHQ/eddie/fix1644
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2020-01-18
Eddie Hung
xilinx_dsp: another typo; move xilinx specific test
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2020-01-18
Eddie Hung
ice40_dsp: fix typo
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2020-01-18
Eddie Hung
Consistency
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2020-01-18
Eddie Hung
xilinx_dsp: add parameter defaults
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2020-01-17
Eddie Hung
Add #1644 testcase
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2020-01-17
Eddie Hung
synth_ice40: call wreduce before mul2dsp
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2020-01-17
Eddie Hung
ice40_dsp: add test
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2020-01-17
Eddie Hung
ice40_dsp: add default values for parameters
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2020-01-17
Eddie Hung
ice40_dsp: tolerant of fanout-less outputs, as well...
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2020-01-17
Eddie Hung
Deprecate `_CLB_CARRY from +/xilinx/arith_map.v since...
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2020-01-17
Eddie Hung
abc9: add some log_{push,pop}() as per @nakengelhardt
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2020-01-17
Eddie Hung
+/xilinx/arith_map.v fix $lcu rule
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2020-01-16
Eddie Hung
Merge remote-tracking branch 'origin/master' into eddie...
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2020-01-16
Eddie Hung
Merge pull request #1639 from YosysHQ/eddie/fix_read_xaiger
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2020-01-15
Eddie Hung
abc9: aAdd test to check $_NOT_s are absorbed
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2020-01-15
Eddie Hung
read_aiger: $lut prefix in front
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2020-01-15
Eddie Hung
write_xaiger: skip abc9_flop only if abc_box_seq present
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2020-01-15
Miodrag Milanović
Merge pull request #1636 from YosysHQ/eddie/fix_synth_x...
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2020-01-15
Eddie Hung
write_xaiger: do not export flop inputs as POs
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2020-01-14
Eddie Hung
Merge remote-tracking branch 'origin/master' into eddie...
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2020-01-14
Eddie Hung
abc9_ops: -reintegrate to not trim box padding anymore
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