| 2020-06-14 | 
whitequark | back.cxxrtl: allow injecting black boxes. | 
commit | commitdiff | tree | 
| 2020-06-14 | 
whitequark | _yosys: add a way to retrieve Yosys data directory. | 
commit | commitdiff | tree | 
| 2020-06-14 | 
whitequark | _yosys: fix typo in error message. | 
commit | commitdiff | tree | 
| 2020-06-11 | 
whitequark | test: fix example test after commit a7b8ced9. | 
commit | commitdiff | tree | 
| 2020-06-11 | 
whitequark | back.cxxrtl: new backend. | 
commit | commitdiff | tree | 
| 2020-06-11 | 
whitequark | _yosys: translate Yosys warnings to Python warnings. | 
commit | commitdiff | tree | 
| 2020-06-11 | 
whitequark | nmigen.cli: fix file type autodetection code. | 
commit | commitdiff | tree | 
| 2020-06-11 | 
whitequark | back.verilog: remove unused imports. NFC. | 
commit | commitdiff | tree | 
| 2020-06-06 | 
Adam Greig | hdl.xfrm: preserve allow_reset_less when transforming...  | 
commit | commitdiff | tree | 
| 2020-06-05 | 
Shawn Anastasio | hdl.rec: preserve shapes when constructing a layout. | 
commit | commitdiff | tree | 
| 2020-05-31 | 
whitequark | setup: exclude tests. | 
commit | commitdiff | tree | 
| 2020-05-31 | 
whitequark | vendor.lattice_ice40: reword confusing comment. NFC. | 
commit | commitdiff | tree | 
| 2020-05-24 | 
Robin Ole Heinemann | hdl.ast: fix typo | 
commit | commitdiff | tree | 
| 2020-05-22 | 
whitequark | back.verilog: fall back to nmigen_yosys package. | 
commit | commitdiff | tree | 
| 2020-05-21 | 
whitequark | Update .gitignore. | 
commit | commitdiff | tree | 
| 2020-05-21 | 
whitequark | vendor.intel: don't use `write_verilog -decimal`. | 
commit | commitdiff | tree | 
| 2020-05-21 | 
whitequark | vendor.intel: double-quote Tcl values rather than brace...  | 
commit | commitdiff | tree | 
| 2020-05-21 | 
whitequark | vendor.xilinx_{7series,ultrascale}: don't use `write_ve...  | 
commit | commitdiff | tree | 
| 2020-05-20 | 
whitequark | build.plat: skip clock constraints on unused signals. | 
commit | commitdiff | tree | 
| 2020-05-20 | 
whitequark | vendor.xilinx_{7series,ultrascale}: add (*keep*) on...  | 
commit | commitdiff | tree | 
| 2020-05-20 | 
whitequark | hdl.ast: add const-shift operations. | 
commit | commitdiff | tree | 
| 2020-05-19 | 
whitequark | hdl.ast: clarify docs for Value.rotate_{left,right}. | 
commit | commitdiff | tree | 
| 2020-05-19 | 
whitequark | hdl.dsl: check for unique domain name. | 
commit | commitdiff | tree | 
| 2020-05-19 | 
whitequark | back.rtlil: handle signed and large Instance parameters...  | 
commit | commitdiff | tree | 
| 2020-05-17 | 
whitequark | tracer: fix get_var_name() to work on toplevel attributes. | 
commit | commitdiff | tree | 
| 2020-05-08 | 
Gwenhael Goavec...  | vendor.lattice_machxo2: generate binary bitstreams. | 
commit | commitdiff | tree | 
| 2020-05-02 | 
whitequark | plat, vendor: systematically escape net and file names...  | 
commit | commitdiff | tree | 
| 2020-04-28 | 
whitequark | back.rtlil: fix incorrect escaping of signed parameters. | 
commit | commitdiff | tree | 
| 2020-04-27 | 
whitequark | hdl.ast: use SignalSet, not ValueSet, for _[lr]hs_signa...  | 
commit | commitdiff | tree | 
| 2020-04-27 | 
whitequark | lib.cdc: add missing documentation for AsyncFFSynchroni...  | 
commit | commitdiff | tree | 
| 2020-04-24 | 
awygle | lib.fifo: add r_rst output for AsyncFIFO{,Buffered}. | 
commit | commitdiff | tree | 
| 2020-04-24 | 
awygle | hdl.ir: typecheck `convert(ports=)` more carefully. | 
commit | commitdiff | tree | 
| 2020-04-24 | 
whitequark | README: link directly to Yosys build instructions. | 
commit | commitdiff | tree | 
| 2020-04-23 | 
Teguh Hofstee | back.verilog: add workaround for evaluation Verific...  | 
commit | commitdiff | tree | 
| 2020-04-22 | 
Teguh Hofstee | back.verilog: make Yosys version check compatible with...  | 
commit | commitdiff | tree | 
| 2020-04-21 | 
Kate Temkin | vendor: use nextpnr -12k for -12F devices; remove theor...  | 
commit | commitdiff | tree | 
| 2020-04-16 | 
anuejn | hdl.rec: make Record inherit from UserValue.  working_23jun2020 | 
commit | commitdiff | tree | 
| 2020-04-15 | 
whitequark | back.rtlil: translate enum decoders to Yosys enum attri...  | 
commit | commitdiff | tree | 
| 2020-04-14 | 
whitequark | buil.plat: enable strict undefined behavior in Jinja2. | 
commit | commitdiff | tree | 
| 2020-04-13 | 
whitequark | back.rtlil: don't emit connections to zero width ports. | 
commit | commitdiff | tree | 
| 2020-04-13 | 
whitequark | back.rtlil: refuse to create extremely large wires. | 
commit | commitdiff | tree | 
| 2020-04-13 | 
whitequark | back.rtlil: fix expansion of Part() for partial dummy...  | 
commit | commitdiff | tree | 
| 2020-04-13 | 
whitequark | back.rtlil: fix legalization of Part() with stride. | 
commit | commitdiff | tree | 
| 2020-04-13 | 
whitequark | Clarify a few comments. NFC. | 
commit | commitdiff | tree | 
| 2020-04-13 | 
Dan Ravensloft | hdl.ast: add Value.{rotate_left,rotate_right}. | 
commit | commitdiff | tree | 
| 2020-04-13 | 
whitequark | Travis: require tests to pass on pypy3. | 
commit | commitdiff | tree | 
| 2020-04-13 | 
whitequark | Travis: upgrade to bionic. | 
commit | commitdiff | tree | 
| 2020-04-12 | 
whitequark | build.run: fix BuildProducts.extract to work with subdi...  | 
commit | commitdiff | tree | 
| 2020-04-12 | 
whitequark | hdl.rec: improve repr() for Layout. | 
commit | commitdiff | tree | 
| 2020-04-12 | 
whitequark | hdl.ast: improve repr() for Shape. | 
commit | commitdiff | tree | 
| 2020-04-12 | 
whitequark | build.plat: don't check for toolchain presence if do_bu...  | 
commit | commitdiff | tree | 
| 2020-04-08 | 
Stuart Olsen | back.pysim: Clear pending updates after they are effected | 
commit | commitdiff | tree | 
| 2020-04-07 | 
Stuart Olsen | back.pysim: Eliminate duplicate dict lookup in VCD...  | 
commit | commitdiff | tree | 
| 2020-04-07 | 
Stuart Olsen | back.pysim: Reuse clock simulation commands | 
commit | commitdiff | tree | 
| 2020-04-05 | 
whitequark | hdl.mem: fix source location of ReadPort.en. | 
commit | commitdiff | tree | 
| 2020-04-03 | 
whitequark | back.pysim: fix emission of undriven traces to VCD...  | 
commit | commitdiff | tree | 
| 2020-04-02 | 
whitequark | setup: bump pyvcd to ~=0.2. | 
commit | commitdiff | tree | 
| 2020-04-02 | 
Jacob Lifshay | Add support for using non-compat Elaboratable instances...  | 
commit | commitdiff | tree | 
| 2020-04-02 | 
whitequark | setup: tighten version constraint on Jinja2. | 
commit | commitdiff | tree | 
| 2020-03-22 | 
whitequark | hdl.ast: implement abs() on values. | 
commit | commitdiff | tree | 
| 2020-03-20 | 
WRansohoff | vendor.lattice_ice40: add support for SB_[LH]FOSC as...  | 
commit | commitdiff | tree | 
| 2020-03-15 | 
Nicolas Robin | vendor: fix typo `async_ff_sync` | 
commit | commitdiff | tree | 
| 2020-03-15 | 
Stuart Olsen | back.pysim: implement modulus operator. | 
commit | commitdiff | tree | 
| 2020-03-14 | 
awygle | Correctly handle resets in AsyncFIFO. | 
commit | commitdiff | tree | 
| 2020-03-12 | 
whitequark | vendor: fix a few issues in commit 2f8669ca. | 
commit | commitdiff | tree | 
| 2020-03-08 | 
awygle | lib.cdc: extract AsyncFFSynchronizer. | 
commit | commitdiff | tree | 
| 2020-02-19 | 
whitequark | hdl.ast: fix off-by-1 in Initial.__init__(). | 
commit | commitdiff | tree | 
| 2020-02-19 | 
whitequark | back.pysim: fix RHS codegen for Cat() and Repl(......  | 
commit | commitdiff | tree | 
| 2020-02-19 | 
whitequark | back.pysim: optionally allow introspecting generated...  | 
commit | commitdiff | tree | 
| 2020-02-16 | 
awygle | nmigen.compat.genlib.cdc: add PulseSynchronizer. | 
commit | commitdiff | tree | 
| 2020-02-16 | 
awygle | nmigen.lib.cdc: port PulseSynchronizer. | 
commit | commitdiff | tree | 
| 2020-02-14 | 
whitequark | Travis: prune dependencies.  v0.2 | 
commit | commitdiff | tree | 
| 2020-02-14 | 
whitequark | Travis: test on Python 3.8. | 
commit | commitdiff | tree | 
| 2020-02-12 | 
whitequark | cli: update use of deprecated code. | 
commit | commitdiff | tree | 
| 2020-02-12 | 
whitequark | back.pysim: accept write_vcd(vcd_file=None). | 
commit | commitdiff | tree | 
| 2020-02-09 | 
whitequark | setup: update project URLs. | 
commit | commitdiff | tree | 
| 2020-02-09 | 
whitequark | doc: remove outdated files and references to them. | 
commit | commitdiff | tree | 
| 2020-02-08 | 
whitequark | README: link to IRC channel. | 
commit | commitdiff | tree | 
| 2020-02-08 | 
whitequark | README: consolidate requirements in the Installation...  | 
commit | commitdiff | tree | 
| 2020-02-07 | 
whitequark | test_build_res: fix after commit 3e2ecdf2. | 
commit | commitdiff | tree | 
| 2020-02-06 | 
whitequark | build.res,vendor: place clock constraint on port, not...  | 
commit | commitdiff | tree | 
| 2020-02-06 | 
whitequark | xilinx_{7series,ultrascale}: run `report_methodology`. | 
commit | commitdiff | tree | 
| 2020-02-06 | 
whitequark | hdl.ast: add Value.{as_signed,as_unsigned}. | 
commit | commitdiff | tree | 
| 2020-02-06 | 
whitequark | test_lib_fifo: define all referenced FSM states. | 
commit | commitdiff | tree | 
| 2020-02-06 | 
whitequark | hdl.dsl: make referencing undefined FSM states an error. | 
commit | commitdiff | tree | 
| 2020-02-06 | 
whitequark | hdl.ir: type check ports. | 
commit | commitdiff | tree | 
| 2020-02-06 | 
whitequark | back.pysim: emit toplevel inputs in VCD files as well. | 
commit | commitdiff | tree | 
| 2020-02-06 | 
whitequark | back.pysim: make `write_vcd(traces=)` actually use...  | 
commit | commitdiff | tree | 
| 2020-02-06 | 
whitequark | hdl.dsl: reject name mismatch in `m.domains.<name>...  | 
commit | commitdiff | tree | 
| 2020-02-06 | 
whitequark | hdl.dsl: type check when adding to m.domains. | 
commit | commitdiff | tree | 
| 2020-02-06 | 
whitequark | hdl.mem: add synthesis attribute support. | 
commit | commitdiff | tree | 
| 2020-02-06 | 
whitequark | hdl.mem: document Memory. | 
commit | commitdiff | tree | 
| 2020-02-04 | 
whitequark | hdl.{ast,dsl}: allow whitespace in bit patterns. | 
commit | commitdiff | tree | 
| 2020-02-01 | 
whitequark | hdl.ast: update documentation for Signal. | 
commit | commitdiff | tree | 
| 2020-02-01 | 
whitequark | hdl.ast: prohibit shifts by signed value. | 
commit | commitdiff | tree | 
| 2020-02-01 | 
whitequark | build.plat: align pipeline with Fragment.prepare(). | 
commit | commitdiff | tree | 
| 2020-02-01 | 
whitequark | hdl.dsl: don't allow inheriting from Module. | 
commit | commitdiff | tree | 
| 2020-02-01 | 
whitequark | hdl.ast: warn on unused property statements (Assert...  | 
commit | commitdiff | tree | 
| 2020-02-01 | 
whitequark | _unused: extract must-use logic from hdl.ir. | 
commit | commitdiff | tree | 
| 2020-01-31 | 
whitequark | hdl.dsl: add missing case width check for Enum values. | 
commit | commitdiff | tree | 
| next |