2020-04-27 |
Vamsi K Vytla | Preserve 'signed'-ness of a verilog wire through RTLIL |
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2020-04-24 |
Claire Wolf | Merge pull request #1995 from YosysHQ/eddie/fix_verific... |
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2020-04-24 |
Dan Ravensloft | intel_alm: cleanup duplication |
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2020-04-23 |
Eddie Hung | verific: do not assert if wire not found; warn instead |
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2020-04-23 |
Eddie Hung | Merge pull request #1974 from YosysHQ/eddie/abc9_disabl... |
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2020-04-23 |
Claire Wolf | Merge pull request #1989 from boqwxp/qbfsat_anyconst_so... |
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2020-04-23 |
Claire Wolf | Merge pull request #1988 from boqwxp/qbfsat |
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2020-04-23 |
Claire Wolf | Merge pull request #1986 from YosysHQ/eddie/verific_enum |
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2020-04-23 |
Dan Ravensloft | intel_alm: work around a Quartus ICE |
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2020-04-23 |
Alberto Gonzalez | qbfsat: Make hole name recovery more robust. Allow... |
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2020-04-23 |
Eddie Hung | Merge pull request #1984 from YosysHQ/eddie/getParam_ex... |
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2020-04-23 |
Alberto Gonzalez | qbfsat: Add `-assume-negative-polarity` option. |
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2020-04-23 |
Eddie Hung | ecp5: ecp5_gsr to skip cells that don't have GSR parame... |
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2020-04-23 |
Eddie Hung | tests: read +/xilinx/cell_sim.v before xilinx_dsp test |
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2020-04-23 |
Eddie Hung | xilinx: xilinx_dsp_cascade to check CREG for DSP48E1... |
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2020-04-23 |
Eddie Hung | verific: import enum attributes from verific |
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2020-04-22 |
Eddie Hung | test: ice40_dsp test to read +/ice40/cells_sim.v for... |
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2020-04-22 |
Eddie Hung | xilinx: improve xilinx_dffopt message |
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2020-04-22 |
Eddie Hung | xilinx: xilinx_dffopt to read cells_sim.v; fix test |
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2020-04-22 |
Eddie Hung | kernel: Cell::getParam() to throw exception again if... |
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2020-04-22 |
Eddie Hung | Merge pull request #1949 from YosysHQ/eddie/select_blackbox |
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2020-04-22 |
Eddie Hung | Merge pull request #1983 from YosysHQ/eddie/use_default... |
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2020-04-22 |
whitequark | Merge pull request #1982 from AsuMagic/asu/cxxrtl-memor... |
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2020-04-22 |
Claire Wolf | Update passes/cmds/select.cc |
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2020-04-22 |
Eddie Hung | Merge pull request #1969 from boqwxp/pool_emplace |
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2020-04-22 |
Eddie Hung | Cleanup use of hard-coded default parameters in light... |
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2020-04-22 |
Asu | cxxrtl: keep the memory write queue sorted on insertion. |
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2020-04-22 |
Eddie Hung | Merge pull request #1973 from YosysHQ/eddie/fix1966 |
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2020-04-22 |
Eddie Hung | tests: update select black/white-box tests |
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2020-04-22 |
Eddie Hung | select: do not select black/white boxes by default... |
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2020-04-22 |
Eddie Hung | Merge pull request #1950 from YosysHQ/eddie/design_import |
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2020-04-22 |
Eddie Hung | yosys-config: spelling |
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2020-04-22 |
Eddie Hung | tests: use `yosys-config --datdir` instead of hard... |
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2020-04-22 |
Eddie Hung | pool: add emplace() function |
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2020-04-22 |
Claire Wolf | Merge pull request #1976 from YosysHQ/dave/fix-sim... |
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2020-04-22 |
Claire Wolf | Merge pull request #1979 from whitequark/cxxrtl-go... |
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2020-04-22 |
whitequark | cxxrtl: run edge detectors only once in eval(). |
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2020-04-22 |
whitequark | cxxrtl: add an unsupported knob for manipulating clock... |
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2020-04-21 |
whitequark | cxxrtl: use log_id() where appropriate. NFC. |
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2020-04-21 |
Marcelina Kościelnicka | bugpoint: Don't remove modules or cells while iterating... |
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2020-04-21 |
whitequark | cxxrtl: add (*cxxrtl.{comb,sync}*) annotations on black... |
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2020-04-21 |
whitequark | cxxrtl: s/sync_{wire,type}/edge_{wire,type}/. NFC. |
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2020-04-21 |
Dan Ravensloft | intel_alm: Documentation improvements |
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2020-04-21 |
Alberto Gonzalez | kernel: Rename arguments to rvalue-reference-accepting... |
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2020-04-21 |
Marcelina Kościelnicka | write_json: dump default parameter values |
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2020-04-21 |
Marcelina Kościelnicka | Use default parameter value in getParam |
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2020-04-21 |
Marcelina Kościelnicka | hierarchy: Convert positional parameters to named. |
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2020-04-21 |
Marcelina Kościelnicka | ilang, ast: Store parameter order and default value... |
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2020-04-21 |
Marcelina Kościelnicka | idict: Make iterator go forward. |
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2020-04-21 |
Claire Wolf | Merge pull request #1971 from YosysHQ/claire/edifkeep |
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2020-04-21 |
Claire Wolf | Merge pull request #1851 from YosysHQ/claire/bitselwrite |
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2020-04-21 |
whitequark | cxxrtl: use one delta cycle for immediately converging... |
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2020-04-21 |
whitequark | cxxrtl: add -O6, a shortcut for running `proc; flatten`. |
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2020-04-21 |
whitequark | cxxrtl: unbuffer module input wires. |
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2020-04-21 |
whitequark | cxxrtl: simplify generated edge detection logic. |
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2020-04-21 |
whitequark | cxxrtl: localize wires with multiple comb drivers,... |
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2020-04-21 |
whitequark | cxxrtl: detect buffered comb wires, not just feedback... |
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2020-04-21 |
Claire Wolf | Add '=' selection pattern prefix for non-blackbox only... |
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2020-04-21 |
Claire Wolf | Improve net priorities in EDIF back-end |
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2020-04-21 |
David Shah | sim: Fix handling of constant-connected cell inputs... |
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2020-04-21 |
whitequark | Merge pull request #1961 from whitequark/paramod-origin... |
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2020-04-20 |
Eddie Hung | tests: remove write_ilang |
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2020-04-20 |
Eddie Hung | Merge pull request #1975 from dh73/claire/bitselwrite |
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2020-04-20 |
Eddie Hung | Remove '-ignore_unknown_cells' option from 'sat' |
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2020-04-20 |
Eddie Hung | Simplify test case script |
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2020-04-20 |
Eddie Hung | Remove ununsed files |
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2020-04-20 |
Eddie Hung | Merge pull request #1972 from YosysHQ/eddie/bug1970 |
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2020-04-20 |
Eddie Hung | abc9: tolerate ABC nonzero exit code if output.aig... |
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2020-04-20 |
diego | Modifications of tests as per Eddie's request |
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2020-04-20 |
Eddie Hung | xilinx/ecp5: disable abc9's "&mfs" optimisation |
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2020-04-20 |
Eddie Hung | abc9: -prep_lut to be more robust |
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2020-04-20 |
Eddie Hung | abc9: add testcase reduced from #1970 |
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2020-04-20 |
Claire Wolf | Ignore conflicting keep attributes, unless asked not... |
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2020-04-20 |
Claire Wolf | Merge pull request #1964 from YosysHQ/claire/sformatf |
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2020-04-20 |
Alberto Gonzalez | Add rvalue-reference-accepting `entry_t` constructor... |
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2020-04-20 |
Alberto Gonzalez | In `pool`, construct `entry_t`s in-place and add an... |
commit | commitdiff | tree |
2020-04-19 |
whitequark | Merge pull request #1967 from whitequark/cxxrtl-blackbo... |
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2020-04-19 |
whitequark | cxxrtl: provide attributes to black box factories,... |
commit | commitdiff | tree |
2020-04-18 |
Claire Wolf | Extend support for format strings in Verilog front-end |
commit | commitdiff | tree |
2020-04-18 |
whitequark | Merge pull request #1963 from whitequark/cxxrtl-blackboxes |
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2020-04-18 |
whitequark | cxxrtl: add templated black box support. |
commit | commitdiff | tree |
2020-04-18 |
whitequark | cxxrtl: make eval() and commit() inline in blackboxes. |
commit | commitdiff | tree |
2020-04-18 |
whitequark | cxxrtl: add simple black box support. |
commit | commitdiff | tree |
2020-04-18 |
whitequark | cxxrtl: use ID::X instead of ID(X). NFC. |
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2020-04-18 |
whitequark | ast, rpc: record original name of $paramod\* as \hdlnam... |
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2020-04-17 |
whitequark | Merge pull request #1955 from whitequark/cxxrtl-sync_always |
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2020-04-17 |
whitequark | Merge pull request #1952 from boqwxp/add_edge_location |
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2020-04-17 |
diego | Wrong fixed value |
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2020-04-17 |
whitequark | cxxrtl: correctly handle `sync always` rules. |
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2020-04-17 |
whitequark | Merge pull request #1954 from YosysHQ/dave/fix-stdout... |
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2020-04-17 |
whitequark | Merge pull request #1951 from whitequark/rtlil-string_a... |
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2020-04-17 |
David Shah | qbfsat: Fix illegal use of 'stdout' identifier |
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2020-04-17 |
Alberto Gonzalez | Set Verilog source location for explicit blocks (`begin... |
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2020-04-17 |
Alberto Gonzalez | Add Verilog source location information to `AST_POSEDGE... |
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2020-04-17 |
whitequark | Merge pull request #1898 from boqwxp/locations |
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2020-04-17 |
whitequark | Merge pull request #1864 from boqwxp/cleanup_techmap_abc |
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2020-04-17 |
whitequark | Merge pull request #1888 from boqwxp/cleanup_scatter |
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2020-04-17 |
whitequark | Merge pull request #1882 from boqwxp/cleanup_rename |
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2020-04-16 |
whitequark | Merge pull request #1929 from YosysHQ/eddie/select_unset |
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2020-04-16 |
whitequark | rtlil: add AttrObject::has_attribute. |
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