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gem5.git
2008-06-12 Gabe BlackX86: Make the regular console use the serial port as... commit | commitdiff | tree
2008-06-12 Gabe BlackX86: Update the regressions for the fact that rdtsc... commit | commitdiff | tree
2008-06-12 Gabe BlackX86: Add in some support for the tsc register. commit | commitdiff | tree
2008-06-12 Gabe BlackCPU: Make the simple cpu trace data for loads/stores. commit | commitdiff | tree
2008-06-11 Ali SaidiX86: Fix building on *BSD hosts commit | commitdiff | tree
2008-06-11 Ali SaidiSCons: Fix more SCons version issues commit | commitdiff | tree
2008-06-11 Nathan BinkertAdded tag copyright_update for changeset 60a931b03fb1 commit | commitdiff | tree
2008-05-20 Ali SaidiIGbE: Implement sending packet that is contained in... copyright_update commit | commitdiff | tree
2008-05-20 Stephen HinesSCons: Fixing SCons bug 2006 issues for non-alpha ISAs commit | commitdiff | tree
2008-05-15 Ali SaidiMake sure that output files are always checked success... commit | commitdiff | tree
2008-05-06 Ali SaidiSCons: More scons fixing for SCons bug 2006 commit | commitdiff | tree
2008-04-10 Ali SaidiSCons: add comments to SConscript documenting bug worka... commit | commitdiff | tree
2008-04-10 Ali SaidiPhysicalMemory: Add parameter for variance in memory... commit | commitdiff | tree
2008-04-08 Ali SaidiSCons: Manually specifying header only directories... commit | commitdiff | tree
2008-04-08 Ali SaidiSCons: Make BATCH options global sticky so libelf is... commit | commitdiff | tree
2008-04-08 Ali SaidiSCons: Add check for SCons version since the latest... commit | commitdiff | tree
2008-03-25 Ali SaidiIGbE: Fix bug that limits wire performance a bit commit | commitdiff | tree
2008-03-25 Steve ReinhardtAutomated merge with ssh://daystrom.m5sim.org//repo/m5 commit | commitdiff | tree
2008-03-25 Steve ReinhardtFix handling of writeback-induced writebacks in atomic... commit | commitdiff | tree
2008-03-25 Gabe BlackX86: Put an RTC into the CMOS part of the southbridge. commit | commitdiff | tree
2008-03-25 Gabe BlackDevices: Separate out the MC146818 RTC so both Alpha... commit | commitdiff | tree
2008-03-25 Gabe BlackX86: Turn #defines into consts. commit | commitdiff | tree
2008-03-25 Gabe BlackX86: Start implementing the south bridge stuff. commit | commitdiff | tree
2008-03-25 Gabe BlackX86: Change the Opteron platform to be the PC platform. commit | commitdiff | tree
2008-03-24 Steve ReinhardtDelete the Request for a no-response Packet commit | commitdiff | tree
2008-03-24 Steve ReinhardtDon't FastAlloc MSHRs since we don't allocate them... commit | commitdiff | tree
2008-03-24 Steve ReinhardtAdd FAST_ALLOC_DEBUG and FAST_ALLOC_STATS as SConstruct... commit | commitdiff | tree
2008-03-23 Steve ReinhardtFix cache problem with writes to tempBlock commit | commitdiff | tree
2008-03-20 Gabe BlackMIPS: Check endianness of binaries in SE mode. commit | commitdiff | tree
2008-03-18 Steve ReinhardtUpdate long regression stats for semi-recent cache... commit | commitdiff | tree
2008-03-17 Steve ReinhardtFix a few Packet memory leaks. commit | commitdiff | tree
2008-03-17 Steve ReinhardtRestructure bus timing calcs to cope with pkt being... commit | commitdiff | tree
2008-03-15 Steve ReinhardtFix subtle cache bug where read could return stale... commit | commitdiff | tree
2008-03-16 Ali SaidiSimpoints: Fix regression bug/Don't set process.simpoin... commit | commitdiff | tree
2008-03-07 Gabe BlackMerge commit | commitdiff | tree
2008-03-07 Gabe BlackX86: Refine the local APIC. commit | commitdiff | tree
2008-03-06 Vilas SridharanO3CPU: Don't call dumpInsts if DEBUG is not defined commit | commitdiff | tree
2008-03-01 Gabe BlackX86: Don't map the local APIC into the physical address... commit | commitdiff | tree
2008-02-29 Ali SaidiAdded tag m5_2.0_beta4 for changeset cad8c2b5d2ec commit | commitdiff | tree
2008-02-29 Ali SaidiAdded tag m5_2.0_beta5 for changeset fb826c79a385 commit | commitdiff | tree
2008-02-29 Lisa HsuError out if -s is used without --caches (instead of... m5_2.0_beta5 commit | commitdiff | tree
2008-02-29 Ali SaidiConfigs: Make sure options don't conflict commit | commitdiff | tree
2008-02-29 Ali SaidiConfigs: Fix some bugs we introduced in the simpoints... commit | commitdiff | tree
2008-02-27 Steve ReinhardtAutomated merge with ssh://daystrom.m5sim.org//repo/m5 commit | commitdiff | tree
2008-02-27 Steve ReinhardtUpdate outputs for quick tests to reflect fixed cache... commit | commitdiff | tree
2008-02-27 Korey SewellAdd comments in code to describe bug conditions. commit | commitdiff | tree
2008-02-27 Korey SewellFix Load/Store Queue squashing after a SMT thread is... commit | commitdiff | tree
2008-02-27 Korey SewellFix offset in removeThread() function so that float... commit | commitdiff | tree
2008-02-27 Steve ReinhardtRevamp cache timing access mshr check to make stats... commit | commitdiff | tree
2008-02-27 Rick StrongConfigs: Make using Simpoints easier with some config... commit | commitdiff | tree
2008-02-27 Gabe BlackX86: Put in initial implementation of the local APIC. commit | commitdiff | tree
2008-02-27 Gabe BlackX86: Implement the INVLPG instruction and the TIA microop. commit | commitdiff | tree
2008-02-27 Gabe BlackTLB: Make a TLB base class and put a virtual demapPage... commit | commitdiff | tree
2008-02-27 Gabe BlackX86: Get PCI config space to work, and adjust address... commit | commitdiff | tree
2008-02-27 Steve ReinhardtCache: better comments particularly regarding writeback... commit | commitdiff | tree
2008-02-26 Ali SaidiUpdate make release, README, and RELEASE_NOTES for b5 commit | commitdiff | tree
2008-02-26 Gabe BlackBus: Update the stats for the recent bus fix. commit | commitdiff | tree
2008-02-26 Gabe BlackBus: Fix the bus timing to be more realistic. commit | commitdiff | tree
2008-02-22 Vilas Sridharanadd instruction count fast forwaing and max instruction... commit | commitdiff | tree
2008-02-19 Stephen HinesAdded ARM_SE as a build option. commit | commitdiff | tree
2008-02-16 Steve ReinhardtUpdate stats for new writeback behavior. commit | commitdiff | tree
2008-02-16 Steve ReinhardtMake L2+ caches allocate new block for writeback misses commit | commitdiff | tree
2008-02-16 Steve ReinhardtUpdate stats for some unknown minor x86 changes commit | commitdiff | tree
2008-02-14 Ali SaidiCPU: move the PC Events code to a place where the code... commit | commitdiff | tree
2008-02-14 Ali SaidiConfigs: Change Simulation.py to return a subclass... commit | commitdiff | tree
2008-02-11 Ali SaidiUpdate copyright dates commit | commitdiff | tree
2008-02-11 Steve ReinhardtAutomated merge with file:/home/stever/hg/m5-orig commit | commitdiff | tree
2008-02-11 Steve ReinhardtEXTRAS now points to src instead of needing 'src' subdir. commit | commitdiff | tree
2008-02-11 Steve ReinhardtWait to set BUILD_DIR until *after* env is copied. commit | commitdiff | tree
2008-02-11 Nicolas ZeaBus: Only update port cache when there is an item to... commit | commitdiff | tree
2008-02-11 Ali SaidiIGbE: Fix a couple of bugs. commit | commitdiff | tree
2008-02-10 Steve ReinhardtFix #include lines for renamed cache files. commit | commitdiff | tree
2008-02-10 Steve ReinhardtRename cache files for brevity and consistency with... commit | commitdiff | tree
2008-02-06 Stephen HinesMake the Event::description() a const function commit | commitdiff | tree
2008-02-06 Stephen HinesAdd base ARM code to M5 commit | commitdiff | tree
2008-02-06 Steve ReinhardtCleaned up os.path imports a bit. commit | commitdiff | tree
2008-02-06 Steve ReinhardtMake EXTRAS work for SConsopts too. commit | commitdiff | tree
2008-01-23 Gabe BlackX86: Put an SMBios/DMI table in memory. commit | commitdiff | tree
2008-01-23 Gabe BlackX86: Optomize the bit scanning instruction microassembl... commit | commitdiff | tree
2008-01-22 Gabe BlackX86: Implement and attach the BSR and BSF instructions. commit | commitdiff | tree
2008-01-21 Gabe BlackX86: Fill out group17 in the decoder. commit | commitdiff | tree
2008-01-21 Gabe BlackX86: Use the existing boot_osflags instead of duplicati... commit | commitdiff | tree
2008-01-16 Ali SaidiUpdate long o3 regressions for o3 change in previous... commit | commitdiff | tree
2008-01-15 Steve ReinhardtUpdate O3 ref outputs: very minor stats change due... commit | commitdiff | tree
2008-01-14 Ke MengThe reason is that the event is supposed to put the... commit | commitdiff | tree
2008-01-12 Gabe BlackX86: Redo the bit test instructions. commit | commitdiff | tree
2008-01-12 Gabe BlackX86: Fix the wrmsr instruction. commit | commitdiff | tree
2008-01-12 Gabe BlackX86: Make the effective segment base shadow the regular... commit | commitdiff | tree
2008-01-12 Gabe BlackX86: Make the IO ports work using extra physical addres... commit | commitdiff | tree
2008-01-12 Gabe BlackX86: Fix the general IO instructions dataSize. commit | commitdiff | tree
2008-01-06 Geoffrey BlakeTemporary fix for ll/sc bug see flyspray task for more... commit | commitdiff | tree
2008-01-02 Steve ReinhardtVery minor memtest regression stats changes from recent... commit | commitdiff | tree
2008-01-02 Steve ReinhardtAdd ReadRespWithInvalidate to handle multi-level cohere... commit | commitdiff | tree
2008-01-02 Steve ReinhardtMark cache-to-cache MSHRs as downstreamPending when... commit | commitdiff | tree
2008-01-02 Steve ReinhardtDon't DPRINTF in the middle of a PrintReq. commit | commitdiff | tree
2008-01-02 Steve ReinhardtBug fix: functional cache port now needs otherPort... commit | commitdiff | tree
2008-01-02 Steve ReinhardtAdditional comments and helper functions for PrintReq. commit | commitdiff | tree
2008-01-02 Steve ReinhardtAdd functional PrintReq command for memory-system debug... commit | commitdiff | tree
2008-01-02 Steve ReinhardtFix formatting and comments in cache_impl.hh commit | commitdiff | tree
2008-01-01 Gabe BlackSPARC: Fix a bug where the TLB would match against... commit | commitdiff | tree
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