mesa.git
2017-01-03 Iago Toral... i965/vec4/tcs: fix input loading for 64-bit data
2017-01-03 Samuel Iglesias... i965/vec4/gs: fix input loading for 64bit data
2017-01-03 Iago Toral... i965/vec4: fix store output for 64-bit types
2017-01-03 Iago Toral... i965/vec4: fix attribute setup for doubles
2017-01-03 Iago Toral... i965/vec4: fix indentation in lower_attributes_to_hw_regs()
2017-01-03 Iago Toral... i965/vec4: make emit_pull_constant_load support 64...
2017-01-03 Iago Toral... i965/vec4: fix move_push_constants_to_pull_constants...
2017-01-03 Iago Toral... i965/vec4: fix indentation in move_push_constants_to_pu...
2017-01-03 Iago Toral... i965/vec4: fix move_uniform_array_access_to_pull_consta...
2017-01-03 Iago Toral... i965/vec4: fix scratch writes for 64bit data
2017-01-03 Iago Toral... i965/vec4: fix scratch reads for 64bit data
2017-01-03 Iago Toral... i965/vec4: fix scratch offset for 64bit data
2017-01-03 Iago Toral... i965/vec4: do not split scratch read/write opcodes
2017-01-03 Iago Toral... i965/vec4: Do not use DepCtrl with 64-bit instructions
2017-01-03 Iago Toral... i965/vec4: extend the DWORD multiply DepCtrl restrictio...
2017-01-03 Samuel Iglesias... i965/vec4: don't copy propagate misaligned registers
2017-01-03 Iago Toral... i965/vec4: don't propagate single-precision uniforms...
2017-01-03 Iago Toral... i965/vec4: Prevent copy propagation from violating...
2017-01-03 Iago Toral... i965/vec4: prevent copy-propagation from values with...
2017-01-03 Connor Abbotti965/vec4: don't constant propagate 64-bit immediates
2017-01-03 Iago Toral... i965/vec4: Fix SSBO stores for 64-bit data
2017-01-03 Iago Toral... i965/vec4: Fix SSBO loads for 64-bit data
2017-01-03 Iago Toral... i965/vec4: Fix UBO loads for 64-bit data
2017-01-03 Iago Toral... i965/vec4: Add a shuffle_64bit_data helper
2017-01-03 Iago Toral... i965/vec4: support multiple dispatch widths and groups...
2017-01-03 Iago Toral... i965/vec4: Lower 64-bit MAD
2017-01-03 Iago Toral... i965/vec4/nir: do not emit 64-bit MAD
2017-01-03 Iago Toral... i965/vec4: Skip swizzle to subnr in 3src instructions...
2017-01-03 Iago Toral... i965/vec4: fix indentation in pack_uniform_registers
2017-01-03 Iago Toral... i965/vec4: fix pack_uniform_registers for doubles
2017-01-03 Iago Toral... i965/vec4: teach register coalescing about 64-bit
2017-01-03 Iago Toral... i965/disasm: fix subreg for dst in Align16 mode
2017-01-03 Iago Toral... i965/vec4: implement access to DF source components Z/W
2017-01-03 Iago Toral... i965/vec4: translate 64-bit swizzles to 32-bit
2017-01-03 Iago Toral... i965/vec4: add a scalarization pass for double-precisio...
2017-01-03 Iago Toral... i965/vec4: split double-precision SEL
2017-01-03 Iago Toral... i965/vec4: teach cmod propagation about different execu...
2017-01-03 Iago Toral... i965/vec4: teach CSE about exec_size, group and doubles
2017-01-03 Iago Toral... i965/disasm: print NibCtrl for instructions with execsi...
2017-01-03 Iago Toral... i965/vec4: dump NibCtrl for instructions with execsize...
2017-01-03 Iago Toral... i965/vec4: make the generator set correct NibCtrl for...
2017-01-03 Iago Toral... i965/vec4: add a SIMD lowering pass
2017-01-03 Iago Toral... i965: move the group field from fs_inst to backend_inst...
2017-01-03 Iago Toral... i965/vec4: add a horiz_offset() helper
2017-01-03 Juan A. Suarez... i965/vec4: handle 32 and 64 bit channels in liveness...
2017-01-03 Iago Toral... i965/vec4: dump the instruction execution size
2017-01-03 Iago Toral... i965/vec4: use the IR's execution size
2017-01-03 Iago Toral... i965/vec4: fix regs_read() for doubles
2017-01-03 Iago Toral... i965/vec4: fix size_written for doubles
2017-01-03 Iago Toral... i965: move exec_size from fs_instruction to backend_ins...
2017-01-03 Samuel Iglesias... i965/vec4: use the new helper function to create double...
2017-01-03 Iago Toral... i965/vec4: add a helper function to create double immed...
2017-01-03 Iago Toral... i965/vec4: fix optimize predicate for doubles
2017-01-03 Iago Toral... i965/vec4: implement fsign() for doubles
2017-01-03 Iago Toral... i965/vec4: implement d2b
2017-01-03 Iago Toral... i965/vec4: implement d2i, d2u, i2d and u2d
2017-01-03 Iago Toral... i965/vec4: implement HW workaround for align16 double...
2017-01-03 Iago Toral... i965/vec4: add helpers for conversions to/from doubles
2017-01-03 Iago Toral... i965/vec4: Rename DF to/from F generator opcodes
2017-01-03 Iago Toral... i965/vec4: fix register allocation for 64-bit undef...
2017-01-03 Iago Toral... i965/vec4: make opt_vector_float ignore doubles
2017-01-03 Iago Toral... i965/vec4: fix get_nir_dest() to use DF type for 64...
2017-01-03 Iago Toral... i965/vec4: fix indentation in get_nir_src()
2017-01-03 Iago Toral... i965/vec4/nir: implement double comparisons
2017-01-03 Iago Toral... i965/vec4: implement double packing
2017-01-03 Iago Toral... i965/vec4: implement double unpacking
2017-01-03 Iago Toral... i965/vec4: don't copy propagate vector opcodes that...
2017-01-03 Iago Toral... i965/vec4: Fix DCE for VEC4_OPCODE_SET_{LOW,HIGH}_32BIT
2017-01-03 Iago Toral... i965/vec4: add VEC4_OPCODE_SET_{LOW,HIGH}_32BIT opcodes
2017-01-03 Iago Toral... i965/vec4: add VEC4_OPCODE_PICK_{LOW,HIGH}_32BIT opcodes
2017-01-03 Iago Toral... i965/vec4: add dst_null_df()
2017-01-03 Iago Toral... i965/vec4: We only support 32-bit integer ALU operation...
2017-01-03 Iago Toral... i965/disasm: align16 DF source regions have a width...
2017-01-03 Iago Toral... i965/vec4: set correct register regions for 32-bit...
2017-01-03 Connor Abbotti965: add brw_vecn_grf()
2017-01-03 Iago Toral... i965/vec4: translate d2f/f2d
2017-01-03 Iago Toral... i965/vec4: add double/float conversion pseudo-opcodes
2017-01-03 Connor Abbotti965/vec4: add support for printing DF immediates
2017-01-03 Iago Toral... i965/vec4/nir: fix emitting 64-bit immediates
2017-01-03 Connor Abbotti965/vec4/nir: set the right type for 64-bit registers
2017-01-03 Iago Toral... i965/vec4/nir: support doubles in ALU operations
2017-01-03 Iago Toral... i965/vec4/nir: Add bit-size information to types
2017-01-03 Connor Abbotti965/vec4/nir: allocate two registers for dvec3/dvec4
2017-01-03 Connor Abbotti965/vec4/nir: simplify glsl_type_for_nir_alu_type()
2017-01-03 Samuel Iglesias... i965/nir: double/dvec2 uniforms only need to be padded...
2017-01-03 Samuel Iglesias... i965/fs: fix exec_size when emitting DIM instruction
2017-01-03 Timothy Arcerist/mesa: get Version from gl_program rather than gl_sha...
2017-01-03 Timothy Arcerii965: stop passing gl_shader_program to brw_compile_gs...
2017-01-03 Timothy Arcerii965: get InfoLog and LinkStatus via the shader program...
2017-01-03 Timothy Arcerii965: eliminate gen6_xfb_enabled field in brw_gs_prog_data
2017-01-03 Timothy Arcerii965: update brw_get_shader_time_index() not to take...
2017-01-02 Marek Olšákgallium/hud: fix the windows build by disabling file...
2017-01-02 Kenneth Graunkeglsl: Update ES 3.2 shader output restrictions.
2017-01-02 Ben Widawskyi965/miptree: Create a disable CCS flag
2017-01-02 Ben Widawskyi965: Replace bool aux disable with enum
2016-12-31 Edmondo Tommasinadocs: document GALLIUM_HUD_DUMP_DIR envvar
2016-12-31 Edmondo Tommasinagallium/hud: set filedescriptor for fps graph
2016-12-31 Edmondo Tommasinagallium/hud: set filedescriptor for cpu graph
2016-12-31 Edmondo Tommasinagallium/hud: move file initialization to a function
2016-12-31 Edmondo Tommasinagallium/hud: dump hud_driver_query values to files
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