2018-10-14 |
Luke Kenneth... | add rv_eq and rv_ne |
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2018-10-14 |
Luke Kenneth... | add rv_eq and rv_ne |
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2018-10-14 |
Luke Kenneth... | add rv_gt headers |
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2018-10-14 |
Luke Kenneth... | add rv_sr |
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2018-10-14 |
Luke Kenneth... | add shiftright |
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2018-10-14 |
Luke Kenneth... | add shiftleft and lessthan |
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2018-10-14 |
Luke Kenneth... | missed a mul |
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2018-10-14 |
Luke Kenneth... | replace % operator with rv_rem |
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2018-10-14 |
Luke Kenneth... | replace ^ operator with rv_xor |
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2018-10-14 |
Luke Kenneth... | replace | operator with rv_or |
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2018-10-14 |
Luke Kenneth... | replace & operator with rv_and |
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2018-10-14 |
Luke Kenneth... | replace operator * with rv_mul |
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2018-10-14 |
Luke Kenneth... | add rv_div (signed and unsigned) to replace operator / |
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2018-10-14 |
Luke Kenneth... | redirect subtract through rv_sub |
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2018-10-14 |
Luke Kenneth... | redirect add to rv_add |
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2018-10-14 |
Luke Kenneth... | redirect add to rv_add |
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2018-10-14 |
Luke Kenneth... | bit of a mess: attempted to create a complete arithmeti... |
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2018-10-13 |
Luke Kenneth... | rename _zext_xlen |
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2018-10-13 |
Luke Kenneth... | add sv_reg_t |
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2018-10-12 |
Luke Kenneth... | redirect WRITE_FRD including different types (128/64/32) |
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2018-10-12 |
Luke Kenneth... | add WRITE_FRD macro redirect |
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2018-10-12 |
Luke Kenneth... | changed style, can revert changes to amomin/max |
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2018-10-12 |
Luke Kenneth... | add frs2 redirect |
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2018-10-12 |
Luke Kenneth... | add RS3 replacement |
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2018-10-12 |
Luke Kenneth... | simplify sv_proc_t redirection of RS1-3 / FRS1 macrhos |
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2018-10-12 |
Luke Kenneth... | redirect RS2 to sv_proc_t class |
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2018-10-12 |
Luke Kenneth... | proof-of-concept, redirect RS1 to class sv_proc_t |
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2018-10-12 |
Luke Kenneth... | combination of redirection through a "property" class... |
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2018-10-11 |
Luke Kenneth... | redirect instructions through a class called sv_proc_t |
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2018-10-11 |
Luke Kenneth... | more explicit testing, duplicating header file algorith... |
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2018-10-11 |
Luke Kenneth... | whoops run from 0-255 not 0-254, and other test corrections |
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2018-10-11 |
Luke Kenneth... | add some operator tests for int8_t being typecast to... |
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2018-10-11 |
Luke Kenneth... | add more experimenting on operators |
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2018-10-10 |
Luke Kenneth... | add operators test class |
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2018-10-10 |
Luke Kenneth... | add operators library to contain operator-overloads... |
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2018-10-09 |
Luke Kenneth... | get predicated-vectorised branch working |
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2018-10-09 |
Luke Kenneth... | save branch address and predication merged result,... |
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2018-10-09 |
Luke Kenneth... | add explanatory comment |
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2018-10-09 |
Luke Kenneth... | add explanatory comment |
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2018-10-09 |
Luke Kenneth... | start adding explicit twin-predicated branch identifica... |
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2018-10-09 |
Luke Kenneth... | extend sv register file from 64 to 128 after discussion. |
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2018-10-07 |
Luke Kenneth... | override setpc macro so that sv can redirect it in... |
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2018-10-07 |
Luke Kenneth... | swap #ifdef USING_NOREGS so that it is possible to... |
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2018-10-07 |
Luke Kenneth... | add rd bit-setting function |
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2018-10-07 |
Luke Kenneth... | add extra debug printing for c.lwsp |
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2018-10-07 |
Luke Kenneth... | add rvc_swsp_imm sv overload, provides vector unit... |
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2018-10-06 |
Luke Kenneth... | c.swsp and c.fswsp predication and offset enabling |
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2018-10-06 |
Luke Kenneth... | allow x2 (sp) to be redirected in C.LWSP |
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2018-10-06 |
Luke Kenneth... | temporary hack disabling SV in anything other than... |
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2018-10-06 |
Luke Kenneth... | whoops inverted ldsp and lwsp immediates |
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2018-10-06 |
Luke Kenneth... | create ldsp immediate offset overrides |
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2018-10-06 |
Luke Kenneth... | add in predication for immediate, for C.LWSP |
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2018-10-05 |
Luke Kenneth... | reorganise src and dest vector-element offsets |
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2018-10-05 |
Luke Kenneth... | add srcoffs and destoffs sv state, alter CSRs |
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2018-10-04 |
Luke Kenneth... | reorganise twin-predication |
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2018-10-04 |
Luke Kenneth... | big reorganisation to support twin-predication |
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2018-10-03 |
Luke Kenneth... | add in twin-predication identification |
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2018-10-03 |
Luke Kenneth... | decided not to change the behaviour of LOAD/STORE |
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2018-10-02 |
Luke Kenneth... | start work on parallelsing LOAD, pass in parameter... |
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2018-10-02 |
Luke Kenneth... | debug print for floating-point regs |
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2018-10-01 |
Luke Kenneth... | add comment explaining why invert isnt done in zeroing... |
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2018-10-01 |
Luke Kenneth... | add comment explaining use of insn._rd() in zeroing |
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2018-10-01 |
Luke Kenneth... | whoops vloop continuation logic the wrong way round |
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2018-10-01 |
Luke Kenneth... | skip parallelisation of complex LR/SC operations |
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2018-10-01 |
Luke Kenneth... | identify type of instruction with additional #defines |
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2018-09-30 |
Luke Kenneth... | add a #define to id_regs.py which indicates name of... |
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2018-09-30 |
Luke Kenneth... | list of instructions to avoid parallelising |
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2018-09-30 |
Luke Kenneth... | update template comment |
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2018-09-30 |
Luke Kenneth... | lots of debugging of predication, found other errors |
commit | commitdiff | tree |
2018-09-30 |
Luke Kenneth... | add sv support for zeroing predication in dest register |
commit | commitdiff | tree |
2018-09-30 |
Luke Kenneth... | add in predication to sv instruction execution |
commit | commitdiff | tree |
2018-09-30 |
Luke Kenneth... | start linking in predication into sv |
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2018-09-30 |
Luke Kenneth... | use an alternative logic for detecting scalar / loop-end |
commit | commitdiff | tree |
2018-09-30 |
Luke Kenneth... | add compressed-identifying patterns to id_regs.py |
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2018-09-30 |
Luke Kenneth... | fix code template for when SPIKE_SIMPLEV is not defined |
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2018-09-30 |
Luke Kenneth... | yuk. break id_regs.py being a generic tool by skipping... |
commit | commitdiff | tree |
2018-09-29 |
Luke Kenneth... | fix bug in sv template where FRS2 was checking rs3 |
commit | commitdiff | tree |
2018-09-29 |
Luke Kenneth... | add checks for RVC registers to sv template |
commit | commitdiff | tree |
2018-09-29 |
Luke Kenneth... | add sv_insn_t overloads for rvc registers |
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2018-09-29 |
Luke Kenneth... | also arrange for id_regs.py to identify compressed... |
commit | commitdiff | tree |
2018-09-29 |
Luke Kenneth... | a LOT of debugging and fixing, sv loop actually working |
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2018-09-29 |
Luke Kenneth... | move SV CSRs to user-read-write |
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2018-09-29 |
Luke Kenneth... | add near-duplicate of SV CFG REG CSRs, for predication |
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2018-09-29 |
Luke Kenneth... | add implementation of CSR SV CFG regs 0-7 |
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2018-09-29 |
Luke Kenneth... | assign SV REG CSRs (using new union ability) |
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2018-09-29 |
Luke Kenneth... | make sv csr tables a union so they can be assigned... |
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2018-09-29 |
Luke Kenneth... | add support for CSR_SVVL to CSRRWI as well |
commit | commitdiff | tree |
2018-09-29 |
Luke Kenneth... | fix bug in CSR set SVVL: val has already been looked up |
commit | commitdiff | tree |
2018-09-29 |
Luke Kenneth... | add stub for SV REG configs |
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2018-09-29 |
Luke Kenneth... | stop a compiler warning |
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2018-09-29 |
Luke Kenneth... | reorganise from moving sv_pred_* and sv_reg_* tables... |
commit | commitdiff | tree |
2018-09-29 |
Luke Kenneth... | have to move SV CSRs into processor_t |
commit | commitdiff | tree |
2018-09-29 |
Luke Kenneth... | add 8 CSRs for registers and predication each |
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2018-09-29 |
Luke Kenneth... | whoops dont need separate SVSETVL/SVGETVL CSRs |
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2018-09-29 |
Luke Kenneth... | revert addition of svsetvl as an actual opcode, add... |
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2018-09-29 |
Luke Kenneth... | Revert "sv setvl as a csr not going to work, add getvl... |
commit | commitdiff | tree |
2018-09-29 |
Luke Kenneth... | Revert "manually add svsetvl instruction" |
commit | commitdiff | tree |
2018-09-28 |
Luke Kenneth... | manually add svsetvl instruction |
commit | commitdiff | tree |
2018-09-28 |
Luke Kenneth... | sv setvl as a csr not going to work, add getvl only |
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2018-09-27 |
Luke Kenneth... | adding sv vector length CSR to processor state, and... |
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next |