yosys.git
2019-02-08 Eddie HungChange literal vars from int to unsigned
2019-02-08 Eddie HungCreate clk outside of latch loop
2019-02-08 Eddie HungHandle latch symbols too
2019-02-08 Eddie HungRemove return after log_error
2019-02-08 Eddie HungAdd support for symbol tables
2019-02-08 Eddie HungStub for binary AIGER
2019-02-06 Eddie HungRefactor
2019-02-06 Eddie HungMerge branch 'dff_init' of https://github.com/eddiehung...
2019-02-06 Eddie HungRevert most of autotest.sh; for non *.v use Yosys to...
2019-02-06 Eddie HungRefactor
2019-02-06 Eddie Hungwrite_verilog to cope with init attr on q when -noexpr
2019-02-06 Eddie HungAdd INIT parameter to all ff/latch cells
2019-02-06 Eddie HungAdd tests for simple cases using defparam
2019-02-06 Eddie HungAdd -B option to autotest.sh to append to backend_opts
2019-02-06 Eddie HungExtend testcase
2019-02-06 Eddie HungAdd testcase
2019-02-06 Eddie HungRename ASCII tests
2019-02-06 Eddie HungWIP
2019-02-06 Clifford WolfAdd missing blackslash-to-slash convertion to smtio...
2019-02-05 Eddie HungAdd tests
2019-01-27 Clifford WolfMerge pull request #798 from mmicko/master
2019-01-27 Clifford WolfMerge pull request #800 from whitequark/write_verilog_t...
2019-01-27 Clifford WolfMerge branch 'whitequark-write_verilog_keyword'
2019-01-27 Clifford WolfRemove asicworld tests for (unsupported) switch-level...
2019-01-27 whitequarkwrite_verilog: write $tribuf cell as ternary.
2019-01-27 whitequarkwrite_verilog: escape names that match SystemVerilog...
2019-01-25 David ShahMerge pull request #796 from whitequark/proc_clean_typo
2019-01-25 Miodrag MilanovicFixed Anlogic simulation model
2019-01-23 whitequarkproc_clean: fix critical typo.
2019-01-19 Clifford WolfMerge pull request #793 from whitequark/proc_clean_fix_...
2019-01-18 whitequarkproc_clean: fix fully def check to consider compare...
2019-01-17 Clifford WolfCleanups in igloo2 example design
2019-01-17 Clifford WolfAdd SF2 IO buffer insertion
2019-01-17 Clifford WolfImprove Igloo2 example
2019-01-17 Clifford WolfAdd "synth_sf2 -vlog", fix "synth_sf2 -edif"
2019-01-17 Clifford WolfAdd "write_edif -gndvccy"
2019-01-15 Clifford WolfAdd optional nullstr argument to log_id()
2019-01-15 Clifford WolfFix handling of $shiftx in Verilog back-end
2019-01-15 Clifford WolfMerge pull request #788 from whitequark/master
2019-01-15 Clifford WolfMerge pull request #787 from whitequark/flowmap_relax
2019-01-14 whitequarkmanual: document some gates.
2019-01-14 whitequarkmanual: explain $tribuf cell.
2019-01-08 Clifford WolfImprove igloo2 example
2019-01-08 whitequarkflowmap: clean up terminology.
2019-01-08 whitequarkflowmap: implement depth relaxation.
2019-01-07 Clifford WolfFix typo in manual
2019-01-07 Clifford WolfBugfix in $memrd sharing
2019-01-07 Clifford WolfMerge pull request #782 from whitequark/flowmap_dfs
2019-01-07 Clifford WolfSwitch "bugpoint" from system() to run_command()
2019-01-07 Clifford WolfMerge pull request #783 from whitequark/bugpoint
2019-01-07 whitequarkbugpoint: new pass.
2019-01-06 whitequarkflowmap: construct a max-volume max-flow min-cut, not...
2019-01-06 Clifford WolfMerge pull request #780 from phire/rename_from_wire
2019-01-06 Scott MansellRename cells based on the wires they drive.
2019-01-05 Clifford WolfAdd skeleton Yosys-Libero igloo2 example project
2019-01-05 Clifford WolfBugfix in Verilog string handling
2019-01-04 whitequarkflowmap: add -minlut option, to allow postprocessing...
2019-01-04 Clifford WolfMerge pull request #777 from mmicko/achronix_cell_sim_fix
2019-01-04 Miodrag MilanovicFix cells_sim.v for Achronix FPGA
2019-01-04 Clifford WolfRemove -m32 Verific eval lib build instructions
2019-01-04 Clifford WolfMerge pull request #776 from mmicko/unify_noflatten
2019-01-04 Clifford WolfUpdate Verific default path
2019-01-04 whitequarkflowmap: cleanup for clarity. NFCI.
2019-01-04 Miodrag MilanovicUnify usage of noflatten among architectures
2019-01-04 whitequarkflowmap: improve debug graph output. NFC.
2019-01-04 whitequarkflowmap: add link to longer version of paper. NFC.
2019-01-03 Clifford WolfMerge pull request #775 from whitequark/opt_flowmap
2019-01-03 whitequarkflowmap: new techmap pass.
2019-01-02 Clifford WolfMerge pull request #770 from whitequark/opt_expr_cmp
2019-01-02 whitequarkopt_expr: improve simplification of comparisons with...
2019-01-02 Clifford WolfMerge pull request #755 from Icenowy/anlogic-dram-init
2019-01-02 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys
2019-01-02 Clifford WolfMerge pull request #750 from Icenowy/anlogic-ff-init
2019-01-02 Clifford WolfMerge pull request #773 from whitequark/opt_lut_elim_fixes
2019-01-02 Clifford WolfMerge pull request #772 from whitequark/synth_lut
2019-01-02 Clifford WolfMerge pull request #771 from whitequark/techmap_cmp2lut
2019-01-02 Clifford WolfImprove VerificImporter support for writes to asymmetri...
2019-01-02 Clifford WolfFix VerificImporter asymmetric memories error message
2019-01-02 Clifford WolfMerge pull request #769 from whitequark/typos
2019-01-02 whitequarkFix typographical and grammatical errors and inconsiste...
2019-01-02 whitequarkopt_lut: reflect changes in sigmap.
2019-01-02 whitequarkopt_lut: use a worklist, and revisit cells affected...
2019-01-02 whitequarkopt_lut: count eliminated cells, and set opt.did_someth...
2019-01-02 whitequarksynth_ice40: use 4-LUT coarse synthesis mode.
2019-01-02 whitequarksynth: add k-LUT mode.
2019-01-02 whitequarksynth: improve script documentation. NFC.
2019-01-02 whitequarkcmp2lut: new techmap pass.
2019-01-02 whitequarkopt_expr: refactor simplification of unsigned X<onehot...
2019-01-02 whitequarkopt_expr: refactor simplification of signed X>=0 and...
2019-01-02 whitequarkopt_expr: simplify any unsigned comparisons with all...
2019-01-01 Clifford WolfMerge pull request #768 from whitequark/opt_lut_elim
2018-12-31 whitequarkopt_lut: eliminate LUTs evaluating to constants or...
2018-12-31 Clifford WolfFix handling of (* keep *) wires in wreduce
2018-12-31 Clifford WolfMerge pull request #766 from Icenowy/anlogic-latches
2018-12-29 Larry DoolittleFix 7 instances of add_share_file to add_gen_share_file
2018-12-29 Larry DoolittleSquelch a little more trailing whitespace
2018-12-25 Icenowy Zhenganlogic: add latch cells
2018-12-23 Clifford WolfMerge pull request #761 from whitequark/proc_clean_partial
2018-12-23 Clifford WolfAdd "read_ilang -[no]overwrite"
2018-12-23 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys
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