yosys.git
2017-08-15 Andrew ZonenbergFixed bug where GP_COUNTx_ADV would wrap even when...
2017-08-15 Clifford WolfMerge branch 'azonenberg-rmports'
2017-08-15 Clifford WolfMostly coding style related fixes in rmports pass
2017-08-15 Clifford WolfMerge branch 'rmports' of https://github.com/azonenberg...
2017-08-14 Clifford WolfMerge pull request #381 from azonenberg/countfix
2017-08-14 Clifford WolfMerge pull request #383 from azonenberg/abcfnames
2017-08-14 Clifford WolfMerge pull request #382 from azonenberg/jsoniofix
2017-08-14 Clifford WolfMerge pull request #384 from azonenberg/crtechlib
2017-08-14 Robert Oucoolrunner2: Add INVERT parameter to some BUFGs
2017-08-14 Robert Oucoolrunner2: Add FFs with clock enable to cells_sim.v
2017-08-14 Robert Ouabc: Allow +/ filenames in the abc command
2017-08-14 Robert Oujson: Parse inout correctly rather than as an output
2017-08-14 Andrew Zonenbergrmports: Now remove ports from cell instances if we...
2017-08-14 Andrew ZonenbergProcessModule is no longer virtual (why was it in the...
2017-08-14 Andrew Zonenbergrmports now works on all modules in the design, not...
2017-08-14 Andrew ZonenbergUpdated Makefile to reflect opt_rmports being renamed...
2017-08-14 Andrew ZonenbergRenamed opt_rmports pass to rmports
2017-08-14 Andrew ZonenbergFixed typo in GP_COUNT8 sim model
2017-08-14 Andrew ZonenbergFixed typo in error message
2017-08-14 Andrew ZonenbergChanged LEVEL resets for GP_COUNTx to be properly synth...
2017-08-14 Andrew ZonenbergChanged LEVEL resets to be edge triggered anyway
2017-08-14 Andrew ZonenbergAdded level-triggered reset support to GP_COUNTx simula...
2017-08-14 Andrew ZonenbergFixed undeclared "count" in GP_COUNT8_ADV
2017-08-14 Andrew ZonenbergFixed undeclared "count" in GP_COUNT14_ADV
2017-08-14 Andrew ZonenbergFixed typo in last commit
2017-08-14 Andrew ZonenbergFinished initial GP_COUNT8/14/8_ADV/14_ADV sim models...
2017-08-14 Andrew ZonenbergFixed typo in COUNT8 model
2017-08-14 Andrew ZonenbergMoved GP_POR out of digital cells b/c it has delays
2017-08-14 Andrew ZonenbergImproved cells_sim_digital model for GP_COUNT8
2017-08-14 Andrew ZonenbergRefactored GreenPAK4 cells_sim into cells_sim_ams and...
2017-08-14 Andrew ZonenbergImproved handling of constant connections in opt_rmports
2017-08-14 Andrew ZonenbergFixed handling of cell ports that aren't wires
2017-08-14 Andrew Zonenbergopt_rmports: Fixed incorrect handling of multi-bit...
2017-08-14 Andrew ZonenbergRemoved commented out debug code
2017-08-14 Andrew ZonenbergAdded opt_rmports pass (remove unconnected ports from...
2017-08-09 Clifford WolfAdd support for set-reset cell variants to opt_rmdff
2017-08-09 Clifford WolfAuto-detect JSON front-end
2017-08-06 Clifford WolfAdd handling of constant reset signals to opt_rmdff
2017-08-04 Clifford WolfAdd "yosys-smtbmc --smtc-init --smtc-top --noinit"
2017-08-04 Clifford WolfAdd "-undefined dynamic_lookup" to OSX "yosys-config...
2017-07-29 Clifford WolfFix typo in "abc" pass help message
2017-07-28 Clifford WolfAdd merging of "past FFs" to verific importer
2017-07-28 Clifford WolfAdd consolidation of init attributes to opt_clean,...
2017-07-28 Clifford WolfAdd minimal support for PSL in VHDL via Verific
2017-07-28 Clifford WolfAdd simple VHDL+PSL example
2017-07-28 Clifford WolfImprove Verific HDL language options
2017-07-28 Clifford WolfFix handling of non-user-declared Verific netbus
2017-07-27 Clifford WolfImprove Verific SVA importer
2017-07-27 Clifford WolfAdd counter.sv SVA test
2017-07-27 Clifford WolfAdd log_warning_noprefix() API, Use for Verific warning...
2017-07-27 Clifford WolfAdd "verific -import -n" and "verific -import -nosva"
2017-07-27 Clifford WolfImprove SVA tests, add Makefile and scripts
2017-07-27 Clifford WolfImprove Verific SVA import: negedge and $past
2017-07-27 Clifford WolfImprove Verific SVA importer
2017-07-26 Clifford WolfAdd "opt_expr -fine" feature to remove neutral bits...
2017-07-26 Clifford WolfImprove Verific bindings (mostly related to SVA)
2017-07-25 Clifford WolfImprove "help verific" message
2017-07-25 Clifford WolfAdd "verific -extnets"
2017-07-25 Clifford WolfAdd "using std::get" to yosys.h
2017-07-25 Clifford WolfImprove "verific -all" handling
2017-07-24 Clifford WolfAdd "verific -import -d <dump_file"
2017-07-24 Clifford WolfAdd "verific -import -flatten" and "verific -import -v"
2017-07-22 Clifford WolfAdd more SVA test cases for future Verific work
2017-07-22 Clifford WolfAdd "verific -import -k"
2017-07-22 Clifford WolfAdd error for cell output ports that are connected...
2017-07-22 Clifford WolfAdd some simple SVA test cases for future Verific work
2017-07-22 Clifford WolfImprove docs for verific bindings, add simply sby example
2017-07-21 Clifford WolfFix handling of empty cell port assignments (i.e. ignor...
2017-07-21 Clifford WolfFix "read_blif -wideports" handling of cells with wide...
2017-07-21 Clifford WolfAdd a paragraph about pre-defined macros to read_verilo...
2017-07-21 Clifford WolfAdd verilator support to testbenches generated by yosys...
2017-07-18 Clifford WolfChange intptr_t to uintptr_t in hashlib.h
2017-07-18 Clifford WolfMerge pull request #363 from rqou/master
2017-07-17 Robert Oumakefile: Add the option to use libtermcap
2017-07-17 Robert OuFix build warnings for win64
2017-07-14 Clifford WolfAdd $alu to list of supported cells for "stat -width"
2017-07-12 Clifford WolfGenerate FSM-style testbenches in smtbmc
2017-07-11 Clifford WolfFix the fixed handling of x-bits in EDIF back-end
2017-07-11 Clifford WolfFix handling of x-bits in EDIF back-end
2017-07-10 Clifford WolfAdd attributes and parameter support to JSON front-end
2017-07-10 Clifford WolfAdd techlibs/xilinx/lut2lut.v
2017-07-08 Clifford WolfAdd JSON front-end
2017-07-07 Clifford WolfChange s/asserts/assertions/ in yosys-smtbmc log messages
2017-07-07 Clifford WolfAdd "yosys-smtbmc --presat"
2017-07-05 Clifford WolfFix generation of multiple outputs for same AIG node...
2017-07-05 Clifford WolfAdd write_table command
2017-07-04 Clifford WolfAdd Verific Release information to log
2017-07-03 Clifford WolfFix some c++ clang compiler errors
2017-07-03 Clifford WolfApply minor coding style changes to coolrunner2 target
2017-07-03 Clifford WolfMerge pull request #352 from rqou/master
2017-07-03 Clifford WolfMerge pull request #356 from set-soft/clean-test
2017-07-03 Clifford WolfMerge pull request #355 from set-soft/exclude_TBUF_merge
2017-07-03 Salvador E... Added the test outputs to the clean target
2017-07-03 Salvador E... Excluded $_TBUF_ from opt_merge pass
2017-07-03 Clifford WolfRemove unneeded delays in smtbmc vlogtb
2017-07-03 Clifford WolfInclude output ports with constant driver in AIGER...
2017-07-01 Clifford WolfAdd "yosys-smtbmc --vlogtb-top"
2017-07-01 Clifford WolfFix and_or_buffer optimization in opt_expr for signed...
2017-07-01 Clifford WolfFix smtbmc vlogtb bug in $anyseq handling
2017-06-30 Clifford WolfAdd "design -import"
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