2020-07-20 |
Jean THOMAS | Use PinsN when possible (fixes #27) |
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2020-07-20 |
Jean THOMAS | Simplify PHY read code |
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2020-07-17 |
Jean THOMAS | Use XDR for RAS#, CAS#, WE#, CLK_EN and ODT |
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2020-07-17 |
Jean THOMAS | Code cleaning in ECP5 PHY |
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2020-07-17 |
Jean THOMAS | Use XDR for ba pins |
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2020-07-17 |
Jean THOMAS | Use XDR for address pins |
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2020-07-17 |
Jean THOMAS | Fix when there are multiple clocks |
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2020-07-17 |
Jean THOMAS | Use nMigen's XDR for DDR clk |
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2020-07-17 |
Jean THOMAS | Remove unused signal |
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2020-07-17 |
Jean THOMAS | Fix code styling |
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2020-07-17 |
Jean THOMAS | Remove adaptation code |
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2020-07-17 |
Jean THOMAS | Remove get_port() function |
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2020-07-17 |
Jean THOMAS | Add test for _AntiStarvation timer duration |
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2020-07-17 |
Jean THOMAS | Fix code styling |
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2020-07-17 |
Jean THOMAS | Use the right domain |
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2020-07-17 |
Jean THOMAS | Fix PHY issues |
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2020-07-17 |
Jean THOMAS | Reduce delay between wishbone_write |
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2020-07-17 |
Jean THOMAS | Factor MRx setting code |
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2020-07-17 |
Jean THOMAS | Log DRAM commands |
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2020-07-17 |
Jean THOMAS | Put proc_rmdead after proc_mux |
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2020-07-17 |
Jean THOMAS | Name each BankMachine instance to improve VCD output |
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2020-07-17 |
Jean THOMAS | Fix CRG parameters |
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2020-07-17 |
Jean THOMAS | Fix DQS_N errors |
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2020-07-17 |
Jean THOMAS | Add more read transactions, add checks, ASAP |
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2020-07-17 |
Jean THOMAS | Remove event in ECP5DDRPHY |
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2020-07-17 |
Jean THOMAS | Remove comment |
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2020-07-16 |
Jean THOMAS | Use assertions in simsoc testbench |
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2020-07-16 |
Jean THOMAS | Add logging and delays to the simulation to make it... |
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2020-07-16 |
Jean THOMAS | Tweak yosys script |
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2020-07-16 |
Jean THOMAS | Backport modifications from example's CRG |
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2020-07-15 |
Jean THOMAS | Write logic equivalences in a clearer way |
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2020-07-15 |
Jean THOMAS | Make Micron model read the mem_init.txt file |
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2020-07-15 |
Jean THOMAS | Make gram simulations faster |
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2020-07-15 |
Jean THOMAS | Add initial memory content |
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2020-07-15 |
Jean THOMAS | Add early code for RAM calibration |
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2020-07-15 |
Jean THOMAS | Expose DFII functions to other objects |
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2020-07-15 |
Jean THOMAS | Increase UART bridge speed in simulation, decrease... |
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2020-07-15 |
Jean THOMAS | Log RAM signals |
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2020-07-15 |
Jean THOMAS | Fix code styling |
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2020-07-15 |
Jean THOMAS | Remove arbiter from headless-ecpix5 example |
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2020-07-15 |
Jean THOMAS | Use random values for memtest |
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2020-07-13 |
Jean THOMAS | Per bytes error highlighting |
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2020-07-13 |
Jean THOMAS | Make _AddressSlicer an elaboratable |
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2020-07-13 |
Jean THOMAS | Update amount of tests |
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2020-07-13 |
Jean THOMAS | Remove unnecessary arbiter |
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2020-07-13 |
Jean THOMAS | Fix timings in libgram |
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2020-07-13 |
Jean THOMAS | Reduce POR duration |
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2020-07-13 |
Jean THOMAS | Fix gearing and UART speed |
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2020-07-13 |
Jean THOMAS | Add additional opt+clean and print stats |
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2020-07-13 |
Jean THOMAS | Make full use of the native port |
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2020-07-13 |
Jean THOMAS | Fix gearing |
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2020-07-13 |
Jean THOMAS | Fix FakePHY bank emulation |
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2020-07-13 |
Jean THOMAS | Remove UnusedElaboratable warning |
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2020-07-10 |
Jean THOMAS | Fix memtest tests (missing parenthesis) |
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2020-07-10 |
Jean THOMAS | Add more memory tests |
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2020-07-10 |
Jean THOMAS | Remove unused files |
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2020-07-10 |
Jean THOMAS | Put every gram component in the dramsync clock domain |
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2020-07-10 |
Jean THOMAS | Use clock freq from platform |
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2020-07-10 |
Jean THOMAS | Use R02 platform file |
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2020-07-10 |
Jean THOMAS | Externalize CRG |
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2020-07-10 |
Jean THOMAS | Fix DDR3 module parameter |
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2020-07-10 |
Jean THOMAS | Fix code styling |
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2020-07-10 |
Jean THOMAS | Add a name to timing_checker submodule |
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2020-07-10 |
Jean THOMAS | Rework headless client interface |
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2020-07-10 |
Jean THOMAS | Improve simulation output: add names to submodules |
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2020-07-10 |
Jean THOMAS | Don't test for tREFI=1 in RefreshTimer |
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2020-07-10 |
Jean THOMAS | Add more R/W operations in test_soc |
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2020-07-10 |
Jean THOMAS | Add script for launching unit tests with fail fast... |
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2020-07-10 |
Jean THOMAS | Remove GTKW files |
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2020-07-10 |
Jean THOMAS | Fix formal checks for RefreshTimer |
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2020-07-10 |
Jean THOMAS | Fix tests for _AntiStarvation |
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2020-07-10 |
Jean THOMAS | Fix code styling |
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2020-07-10 |
Jean THOMAS | Rename VCD file output |
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2020-07-10 |
Jean THOMAS | Rename tests, add interleaved read/write test |
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2020-07-10 |
Jean THOMAS | Implement a memory in the bank simulator, check for... |
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2020-07-10 |
Jean THOMAS | Fix timings in simulation to prevent tDLLK errors |
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2020-07-10 |
Jean THOMAS | Add POR start/end logging in simsoc testbench |
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2020-07-09 |
Jean THOMAS | Make power-on delay signal synchronous |
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2020-07-09 |
Jean THOMAS | Fix formatting in headless example |
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2020-07-09 |
Jean THOMAS | Add test for SoC readout |
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2020-07-09 |
Jean THOMAS | Disable Assert statements until they are natively suppo... |
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2020-07-09 |
Jean THOMAS | Comment buggy assertions |
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2020-07-09 |
Jean THOMAS | Add imports for Assert & Assume in FakePHY |
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2020-07-09 |
Jean THOMAS | Fix counter reset condition bug |
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2020-07-09 |
Jean THOMAS | Fix syntax in FakePHY assertions |
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2020-07-09 |
Jean THOMAS | Use assertions as a temporary replacement for Display... |
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2020-07-09 |
Jean THOMAS | Remove unused BitFlip |
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2020-07-09 |
Jean THOMAS | Update build script to include software version |
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2020-07-08 |
Jean THOMAS | Add temporary code for SoC tests with FakePHY |
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2020-07-08 |
Jean THOMAS | Port FakePHY to nMigen |
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2020-07-08 |
Jean THOMAS | Match ECPIX-5 DRAM parameters in Micron's model |
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2020-07-08 |
Jean THOMAS | Import fake PHY from LiteDRAM (non functionnal ATM) |
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2020-07-08 |
Jean THOMAS | Fix styling |
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2020-07-08 |
Jean THOMAS | Add test case for AntiStarvation |
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2020-07-08 |
Jean THOMAS | Fix bugs in _AntiStarvation |
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2020-07-08 |
Jean THOMAS | Update memtest code |
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2020-07-08 |
Jean THOMAS | Remove useless variables in _Steerer, ensure command... |
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2020-07-08 |
Jean THOMAS | Make an Elaboratable out of the anti_starvation function |
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2020-07-08 |
Jean THOMAS | Add links to various docs that have been helpful |
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2020-07-08 |
Jean THOMAS | Drop YoWASP, build Yosys and SymbiYosys from source |
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