yosys.git
2022-05-30 Daniel HuismanFix typo in emcc flags (typo introduced by #3053)
2022-05-30 Jannis Harderverilog: fix size and signedness of array querying...
2022-05-28 github-actions... Bump version
2022-05-27 Patrick Urbangatemate: Fix minor issues with `memory_libmap` (#3343)
2022-05-27 Miodrag MilanovićMerge pull request #3333 from mohamed/feature/tmpdir
2022-05-27 Miodrag MilanovicCleanup, and fix windows
2022-05-27 Mohamed A.... Observe $TMPDIR variable when creating tmp files
2022-05-27 Miodrag MilanovićMerge pull request #3341 from mmicko/unused_vars
2022-05-27 Miodrag MilanovicUpload emscripten artifact
2022-05-27 Miodrag MilanovicRemove set but unused variable
2022-05-27 Miodrag MilanovicAdd emcc build (stuck if all cpus used on GH)
2022-05-27 Miodrag MilanovicProper std::move
2022-05-27 Miodrag MilanovicUse proper operator
2022-05-27 Miodrag MilanovićMerge pull request #3053 from DanielHuisman/pr-2
2022-05-26 github-actions... Bump version
2022-05-25 Jannis Harderverilog: fix $past's signedness
2022-05-25 Miodrag MilanovićMerge pull request #3011 from DanielHuisman/pr-1
2022-05-25 Jannis HarderMerge pull request #3335 from programmerjake/divfloor...
2022-05-25 Miodrag MilanovićMerge pull request #3138 from DanielG/fix-git-rev
2022-05-25 Daniel GröberMake GIT_REV logic work in release tarballs
2022-05-25 Jannis Harderverilog: fix signedness when removing unreachable cases
2022-05-24 Jacob Lifshayadd $divfloor support to write_smt2 divfloor-in-write_smt2
2022-05-24 github-actions... Bump version
2022-05-23 Miodrag MilanovićMerge pull request #3332 from YosysHQ/verific_f
2022-05-23 Miodrag Milanovicfix text to fit 80 columns
2022-05-23 Miodrag MilanovicUpdate verific command file documentation
2022-05-23 Miodrag MilanovicUse analysis mode if set in file
2022-05-23 Miodrag MilanovićMerge pull request #3331 from YosysHQ/git_rev_fix
2022-05-23 Jannis HarderChange way to get commit sha
2022-05-23 gatecatabc9_ops: Don't leave unused derived modules lying...
2022-05-21 github-actions... Bump version
2022-05-20 Jannis HarderMerge pull request #3324 from jix/confusing-select...
2022-05-19 Jannis Harderselect: Fix -assert-none and -assert-any error output...
2022-05-19 github-actions... Bump version
2022-05-18 Marcelina KościelnickaAdd memory_bmux2rom pass.
2022-05-18 Marcelina KościelnickaAdd memory_libmap tests.
2022-05-18 Marcelina Kościelnickagatemate: Use `memory_libmap` pass.
2022-05-18 Marcelina Kościelnickamachxo2: Use `memory_libmap` pass.
2022-05-18 Marcelina Kościelnickaefinix: Use `memory_libmap` pass.
2022-05-18 Marcelina Kościelnickaanlogic: Use `memory_libmap` pass.
2022-05-18 Marcelina Kościelnickaice40: Use `memory_libmap` pass.
2022-05-18 Marcelina Kościelnickaxilinx: Use `memory_libmap` pass.
2022-05-18 Marcelina Kościelnickagowin: Use `memory_libmap` pass.
2022-05-18 Marcelina Kościelnickanexus: Use `memory_libmap` pass.
2022-05-18 Marcelina Kościelnickaecp5: Use `memory_libmap` pass.
2022-05-18 Marcelina KościelnickaAdd memory_libmap pass.
2022-05-18 Marcelina Kościelnickaproc_rom: Add special handling of const-0 address bits.
2022-05-18 github-actions... Bump version
2022-05-17 Miodrag MilanovićMerge pull request #3310 from robinsonb5-PRs/master master
2022-05-17 Marcelina Kościelnickaopt_ffinv: Use ModIndex instead of ModWalker.
2022-05-16 Alastair M... Use log_warning when Tcl_Init fails, report error with...
2022-05-16 Jannis HarderMerge pull request #3314 from jix/sva_value_change_logi...
2022-05-14 github-actions... Bump version
2022-05-13 Marcelina KościelnickaAdd opt_ffinv pass.
2022-05-13 github-actions... Bump version
2022-05-12 Marcelina KościelnickaAdd proc_rom pass.
2022-05-11 Jannis Harderverific: Use new value change logic also for $stable...
2022-05-10 Alastair M... Now calls Tcl_Init after creating the interp, fixes...
2022-05-10 github-actions... Bump version
2022-05-09 Jannis HarderMerge pull request #3305 from jix/sva_value_change_logic
2022-05-09 Jannis HarderMerge pull request #3297 from jix/sva_nested_clk_else
2022-05-09 Jannis Harderverific: Improve logic generated for SVA value change...
2022-05-09 Miodrag MilanovicNext dev cycle
2022-05-09 Miodrag MilanovicRelease version 0.17 yosys-0.17
2022-05-09 Miodrag MilanovicUpdate CHANGELOG
2022-05-09 Miodrag MilanovicUpdate manual
2022-05-09 Miodrag MilanovićMerge pull request #3299 from YosysHQ/mmicko/sim_memory
2022-05-09 Miodrag MilanovicFix running sva tests
2022-05-08 github-actions... Bump version
2022-05-07 Marcelina Kościelnickaopt_mem: Remove constant-value bit lanes.
2022-05-07 github-actions... Bump version
2022-05-06 Miodrag Milanovicinclude latest abc changes
2022-05-06 Miodrag Milanovicinclude latest abc changes
2022-05-06 Miodrag MilanovićMerge pull request #3300 from imhcyx/master
2022-05-06 Miodrag MilanovicInclude abc change to fix FreeBSD build
2022-05-06 Miodrag MilanovicHandle possible non-memory indexed data
2022-05-05 imhcyxmemory_share: fix wrong argidx in extra_args
2022-05-05 github-actions... Bump version
2022-05-04 Marcelina Kościelnickaabc: Use dict/pool instead of std::map/std::set
2022-05-04 Miodrag Milanovicmap memory location to wire value, if memory is convert...
2022-05-04 Miodrag Milanovicfix crash when no fst input
2022-05-04 Miodrag MilanovicStart restoring memory state from VCD/FST
2022-05-04 Claire Xenia... Add propagated clock signals into btor info file
2022-05-03 Jannis Harderverific: Fix conditions of SVAs with explicit clocks...
2022-05-03 github-actions... Bump version
2022-05-02 Miodrag MilanovicAIM file could have gaps in or between inputs and inits
2022-04-30 github-actions... Bump version
2022-04-29 Miodrag MilanovićMerge pull request #3294 from YosysHQ/micko/verific_mer...
2022-04-29 Miodrag MilanovicIgnore merging past ffs that we are not properly merging
2022-04-26 github-actions... Bump version
2022-04-25 Rick LuikenAdd missing parameters for ecp5
2022-04-25 Jannis HarderMerge pull request #3287 from jix/smt2-conditional...
2022-04-25 Jannis HarderMerge pull request #3257 from jix/tribuf-formal
2022-04-25 Miodrag MilanovićMerge pull request #3290 from mpasternacki/bugfix/freeb...
2022-04-25 Miodrag MilanovićMerge pull request #3289 from YosysHQ/micko/sim_improve
2022-04-24 Maciej PasternackiFix build on FreeBSD, which has no alloca.h
2022-04-22 Miodrag MilanovicMatch $anyseq input if connected to public wire
2022-04-22 Miodrag MilanovicTreat $anyseq as input from FST
2022-04-22 Miodrag MilanovicIgnore change on last edge
2022-04-22 Miodrag MilanovicLast sample from input does not represent change
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