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gem5.git
2006-10-20
Nathan Binkert
Construct a correct value of PYTHONHOME from the interp...
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2006-10-20
Ron Dreslinski
Give physical memory some latency to stress the system
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2006-10-20
Ron Dreslinski
Add a config file in the example with the memtester...
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2006-10-20
Ron Dreslinski
Get rid of a variable put back by merge.
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2006-10-20
Ron Dreslinski
Merge zizzer:/bk/newmem
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2006-10-20
Ron Dreslinski
Use fixPacket function everywhere.
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2006-10-20
Nathan Binkert
Use PacketPtr everywhere
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2006-10-20
Nathan Binkert
refactor code for the packet, get rid of packet_impl.hh
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2006-10-20
Nathan Binkert
initialize end, clean up loop
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2006-10-20
Nathan Binkert
Fix compile of m5.fast
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2006-10-20
Steve Reinhardt
Delete unused file src/mem/cache.hh
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2006-10-20
Steve Reinhardt
m5term: assume localhost if host name not provided.
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2006-10-20
Ron Dreslinski
Fix corner case on assertion.
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2006-10-20
Ron Dreslinski
Fix memtester to use functional access, fix cache to...
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2006-10-20
Ron Dreslinski
Small changes:
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2006-10-20
Ron Dreslinski
Fixes to get single level uni-coherence to work.
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2006-10-19
Ron Dreslinski
Merge zizzer:/bk/newmem
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2006-10-19
Ron Dreslinski
Always get the functional access from the highest level...
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2006-10-19
Ron Dreslinski
Also mark the packet as successful.
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2006-10-19
Ron Dreslinski
Properly update the state in the cache block on functio...
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2006-10-19
Steve Reinhardt
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
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2006-10-19
Steve Reinhardt
Add "All" compund flag to enable all defined trace...
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2006-10-19
Steve Reinhardt
Add new event priority for trace enable events so
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2006-10-19
Steve Reinhardt
First cut at LL/SC support in caches (atomic mode only).
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2006-10-18
Lisa Hsu
how did i not commit this already? the other way doesn...
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2006-10-18
Lisa Hsu
need some initializations before doing the loop.
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2006-10-18
Lisa Hsu
only do this assert after you know you're not switched...
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2006-10-18
Ron Dreslinski
Fix WriteInvalidateResp
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2006-10-18
Ron Dreslinski
Merge zizzer:/bk/newmem
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2006-10-18
Steve Reinhardt
Break a lot of overly long lines.
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2006-10-18
Steve Reinhardt
Get rid of doData() lines (were already commented out).
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2006-10-18
Steve Reinhardt
Get rid of obsolete in-cache copy support.
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2006-10-18
Steve Reinhardt
Add --caches option to add caches to server CPUs.
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2006-10-18
Steve Reinhardt
Include packet_impl.hh (need this on my laptop,
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2006-10-18
Steve Reinhardt
Enable MP systems via cmd-line flag in fs.py.
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2006-10-17
Ali Saidi
add code to serialize se structures. Lisa is working...
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2006-10-17
Ron Dreslinski
Fixes for uni-coherence in timing mode for FS.
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2006-10-17
Ron Dreslinski
Fixes to cache eliminating the assumption that the...
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2006-10-17
Ron Dreslinski
Properly chack the pkt pointer on upgrades to insure...
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2006-10-17
Ron Dreslinski
Fix it so that the cache does not assume to gave the...
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2006-10-17
Ron Dreslinski
Merge zizzer:/bk/newmem
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2006-10-17
Steve Reinhardt
Rename 'Machine' to 'SysConfig'.
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2006-10-17
Ron Dreslinski
Merge zizzer:/bk/newmem
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2006-10-14
Steve Reinhardt
Get rid of unused CacheBlk << output operator.
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2006-10-13
Gabe Black
Merge 141.212.106.238:/home/gblack/m5/newmem_bus
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2006-10-13
Gabe Black
Fix stats for new bus model
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2006-10-13
Kevin Lim
Fix assertion. I haven't tested it fully (I can't...
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2006-10-13
Ron Dreslinski
Merge zizzer:/bk/newmem
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2006-10-13
Ron Dreslinski
Fix for DMA's in FS caches.
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2006-10-13
Ali Saidi
fix a bug in CopyStringOut. dprintk appears to work...
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2006-10-12
Lisa Hsu
Merge zizzer:/bk/newmem
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2006-10-12
Ali Saidi
replace functional code in tport with fixPacket().
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2006-10-12
Korey Sewell
Merge zizzer:/bk/newmem
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2006-10-12
Korey Sewell
config file updates
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2006-10-12
Ron Dreslinski
Fix CSHR retrys
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2006-10-12
Ali Saidi
Merge zizzer:/bk/newmem
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2006-10-12
Ali Saidi
small bus updates for functional accesses
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2006-10-12
Korey Sewell
Merge zizzer:/bk/newmem
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2006-10-12
Korey Sewell
Add test binary & inputs
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2006-10-12
Ron Dreslinski
Merge zizzer:/bk/newmem
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2006-10-12
Ron Dreslinski
Remove bus and top level parameters from cache
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2006-10-12
Ali Saidi
Merge zizzer:/bk/newmem
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2006-10-12
Ali Saidi
add a traceflag for functional accesses
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2006-10-12
Ron Dreslinski
Check the response queue on functional accesses.
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2006-10-12
Ron Dreslinski
Another memleak in the memtester (need [] with the...
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2006-10-12
Ron Dreslinski
Fix a memory leak in the memtester
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2006-10-12
Ron Dreslinski
Fix problems with unCacheable addresses in timing-coherence
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2006-10-12
Ron Dreslinski
Merge zizzer:/bk/newmem
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2006-10-12
Ron Dreslinski
Make default ID unique (not broadcast)
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2006-10-11
Ron Dreslinski
Forgot to mark myself as on the retry list
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2006-10-11
Korey Sewell
add spec2k tests
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2006-10-11
Ron Dreslinski
Fix bus in FS mode.
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2006-10-11
Korey Sewell
add bzip test-prog
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2006-10-11
Lisa Hsu
System not global object, need to preface it with objects.
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2006-10-11
Lisa Hsu
since memoryMode was put into the System (from SimObjec...
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2006-10-11
Lisa Hsu
some drain changes in timing (kevin's) and some memory...
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2006-10-11
Ron Dreslinski
More cache fixes. Atomic coherence now works as well.
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2006-10-11
Ron Dreslinski
Update for Atomic Coherece with Gabes bus
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2006-10-11
Ron Dreslinski
Interesting memtest finally.
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2006-10-11
Ron Dreslinski
Merge zizzer:/n/wexford/x/gblack/m5/newmem_bus
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2006-10-11
Ron Dreslinski
Use bus response time paramteres
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2006-10-11
Gabe Black
Don't call recvRetry if the bus is busy anyway. This...
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2006-10-11
Ron Dreslinski
Merge zizzer:/n/wexford/x/gblack/m5/newmem_bus
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2006-10-11
Gabe Black
Make the bus work if the other sides recvRetry doesn...
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2006-10-11
Ron Dreslinski
When turning asserts into if's don't forget to invert.
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2006-10-11
Ron Dreslinski
Writebacks can be pulled out from under the BusRequest...
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2006-10-11
Ron Dreslinski
Only issue responses if we aren;t already blocked
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2006-10-11
Ron Dreslinski
Merge zizzer:/n/wexford/x/gblack/m5/newmem_bus
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2006-10-11
Gabe Black
Make the bus is occupied for none broadcast packets...
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2006-10-11
Ron Dreslinski
Merge zizzer:/n/wexford/x/gblack/m5/newmem_bus
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2006-10-11
Ron Dreslinski
Debugging info
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2006-10-11
Gabe Black
Put in an accounting mechanism and an assert to make...
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2006-10-10
Gabe Black
Fixed a corner case and simplified the logic in Packet...
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2006-10-10
Ron Dreslinski
Merge zizzer:/n/wexford/x/gblack/m5/newmem_bus
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2006-10-10
Ron Dreslinski
Some more code cleanup
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2006-10-10
Gabe Black
Changed the bus to use a bool to keep track of retries...
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2006-10-10
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2006-10-10
Ron Dreslinski
Fix some more mem leaks, still some left
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2006-10-10
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2006-10-10
Ron Dreslinski
Fix cshr Retry's
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