gem5.git
2006-10-20 Nathan BinkertConstruct a correct value of PYTHONHOME from the interp...
2006-10-20 Ron DreslinskiGive physical memory some latency to stress the system
2006-10-20 Ron DreslinskiAdd a config file in the example with the memtester...
2006-10-20 Ron DreslinskiGet rid of a variable put back by merge.
2006-10-20 Ron DreslinskiMerge zizzer:/bk/newmem
2006-10-20 Ron DreslinskiUse fixPacket function everywhere.
2006-10-20 Nathan BinkertUse PacketPtr everywhere
2006-10-20 Nathan Binkertrefactor code for the packet, get rid of packet_impl.hh
2006-10-20 Nathan Binkertinitialize end, clean up loop
2006-10-20 Nathan BinkertFix compile of m5.fast
2006-10-20 Steve ReinhardtDelete unused file src/mem/cache.hh
2006-10-20 Steve Reinhardtm5term: assume localhost if host name not provided.
2006-10-20 Ron DreslinskiFix corner case on assertion.
2006-10-20 Ron DreslinskiFix memtester to use functional access, fix cache to...
2006-10-20 Ron DreslinskiSmall changes:
2006-10-20 Ron DreslinskiFixes to get single level uni-coherence to work.
2006-10-19 Ron DreslinskiMerge zizzer:/bk/newmem
2006-10-19 Ron DreslinskiAlways get the functional access from the highest level...
2006-10-19 Ron DreslinskiAlso mark the packet as successful.
2006-10-19 Ron DreslinskiProperly update the state in the cache block on functio...
2006-10-19 Steve ReinhardtMerge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
2006-10-19 Steve ReinhardtAdd "All" compund flag to enable all defined trace...
2006-10-19 Steve ReinhardtAdd new event priority for trace enable events so
2006-10-19 Steve ReinhardtFirst cut at LL/SC support in caches (atomic mode only).
2006-10-18 Lisa Hsuhow did i not commit this already? the other way doesn...
2006-10-18 Lisa Hsuneed some initializations before doing the loop.
2006-10-18 Lisa Hsuonly do this assert after you know you're not switched...
2006-10-18 Ron DreslinskiFix WriteInvalidateResp
2006-10-18 Ron DreslinskiMerge zizzer:/bk/newmem
2006-10-18 Steve ReinhardtBreak a lot of overly long lines.
2006-10-18 Steve ReinhardtGet rid of doData() lines (were already commented out).
2006-10-18 Steve ReinhardtGet rid of obsolete in-cache copy support.
2006-10-18 Steve ReinhardtAdd --caches option to add caches to server CPUs.
2006-10-18 Steve ReinhardtInclude packet_impl.hh (need this on my laptop,
2006-10-18 Steve ReinhardtEnable MP systems via cmd-line flag in fs.py.
2006-10-17 Ali Saidiadd code to serialize se structures. Lisa is working...
2006-10-17 Ron DreslinskiFixes for uni-coherence in timing mode for FS.
2006-10-17 Ron DreslinskiFixes to cache eliminating the assumption that the...
2006-10-17 Ron DreslinskiProperly chack the pkt pointer on upgrades to insure...
2006-10-17 Ron DreslinskiFix it so that the cache does not assume to gave the...
2006-10-17 Ron DreslinskiMerge zizzer:/bk/newmem
2006-10-17 Steve ReinhardtRename 'Machine' to 'SysConfig'.
2006-10-17 Ron DreslinskiMerge zizzer:/bk/newmem
2006-10-14 Steve ReinhardtGet rid of unused CacheBlk << output operator.
2006-10-13 Gabe BlackMerge 141.212.106.238:/home/gblack/m5/newmem_bus
2006-10-13 Gabe BlackFix stats for new bus model
2006-10-13 Kevin LimFix assertion. I haven't tested it fully (I can't...
2006-10-13 Ron DreslinskiMerge zizzer:/bk/newmem
2006-10-13 Ron DreslinskiFix for DMA's in FS caches.
2006-10-13 Ali Saidifix a bug in CopyStringOut. dprintk appears to work...
2006-10-12 Lisa HsuMerge zizzer:/bk/newmem
2006-10-12 Ali Saidireplace functional code in tport with fixPacket().
2006-10-12 Korey SewellMerge zizzer:/bk/newmem
2006-10-12 Korey Sewellconfig file updates
2006-10-12 Ron DreslinskiFix CSHR retrys
2006-10-12 Ali SaidiMerge zizzer:/bk/newmem
2006-10-12 Ali Saidismall bus updates for functional accesses
2006-10-12 Korey SewellMerge zizzer:/bk/newmem
2006-10-12 Korey SewellAdd test binary & inputs
2006-10-12 Ron DreslinskiMerge zizzer:/bk/newmem
2006-10-12 Ron DreslinskiRemove bus and top level parameters from cache
2006-10-12 Ali SaidiMerge zizzer:/bk/newmem
2006-10-12 Ali Saidiadd a traceflag for functional accesses
2006-10-12 Ron DreslinskiCheck the response queue on functional accesses.
2006-10-12 Ron DreslinskiAnother memleak in the memtester (need [] with the...
2006-10-12 Ron DreslinskiFix a memory leak in the memtester
2006-10-12 Ron DreslinskiFix problems with unCacheable addresses in timing-coherence
2006-10-12 Ron DreslinskiMerge zizzer:/bk/newmem
2006-10-12 Ron DreslinskiMake default ID unique (not broadcast)
2006-10-11 Ron DreslinskiForgot to mark myself as on the retry list
2006-10-11 Korey Sewelladd spec2k tests
2006-10-11 Ron DreslinskiFix bus in FS mode.
2006-10-11 Korey Sewelladd bzip test-prog
2006-10-11 Lisa HsuSystem not global object, need to preface it with objects.
2006-10-11 Lisa Hsusince memoryMode was put into the System (from SimObjec...
2006-10-11 Lisa Hsusome drain changes in timing (kevin's) and some memory...
2006-10-11 Ron DreslinskiMore cache fixes. Atomic coherence now works as well.
2006-10-11 Ron DreslinskiUpdate for Atomic Coherece with Gabes bus
2006-10-11 Ron DreslinskiInteresting memtest finally.
2006-10-11 Ron DreslinskiMerge zizzer:/n/wexford/x/gblack/m5/newmem_bus
2006-10-11 Ron DreslinskiUse bus response time paramteres
2006-10-11 Gabe BlackDon't call recvRetry if the bus is busy anyway. This...
2006-10-11 Ron DreslinskiMerge zizzer:/n/wexford/x/gblack/m5/newmem_bus
2006-10-11 Gabe BlackMake the bus work if the other sides recvRetry doesn...
2006-10-11 Ron DreslinskiWhen turning asserts into if's don't forget to invert.
2006-10-11 Ron DreslinskiWritebacks can be pulled out from under the BusRequest...
2006-10-11 Ron DreslinskiOnly issue responses if we aren;t already blocked
2006-10-11 Ron DreslinskiMerge zizzer:/n/wexford/x/gblack/m5/newmem_bus
2006-10-11 Gabe BlackMake the bus is occupied for none broadcast packets...
2006-10-11 Ron DreslinskiMerge zizzer:/n/wexford/x/gblack/m5/newmem_bus
2006-10-11 Ron DreslinskiDebugging info
2006-10-11 Gabe BlackPut in an accounting mechanism and an assert to make...
2006-10-10 Gabe BlackFixed a corner case and simplified the logic in Packet...
2006-10-10 Ron DreslinskiMerge zizzer:/n/wexford/x/gblack/m5/newmem_bus
2006-10-10 Ron DreslinskiSome more code cleanup
2006-10-10 Gabe BlackChanged the bus to use a bool to keep track of retries...
2006-10-10 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2006-10-10 Ron DreslinskiFix some more mem leaks, still some left
2006-10-10 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2006-10-10 Ron DreslinskiFix cshr Retry's
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