yosys.git
2019-08-10 Eddie HungAdd wreduce to synth_ice40 -dsp as well
2019-08-09 Eddie HungAnother filter -> if
2019-08-09 Eddie HungCleanup
2019-08-09 Eddie HungPack partial-product adder DSP48E1 packing
2019-08-09 Eddie HungFix check
2019-08-09 Eddie HungRevert "Fix typo"
2019-08-08 Eddie HungRemove muxY and ffY for now
2019-08-08 Eddie HungRemove signed from ports in +/xilinx/dsp_map.v
2019-08-08 Eddie HungRework ice40_dsp to map to SB_MAC16 earlier, and check...
2019-08-08 Eddie HungCombine techmap calls
2019-08-08 Eddie HungOnly pack registers if {A,B,P}REG = 0, do not pack...
2019-08-08 Eddie HungMove xilinx_dsp to before alumacc
2019-08-08 Eddie HungDisable $dffe
2019-08-08 Eddie HungINMODE is 5 bits
2019-08-08 Eddie HungFix copy-pasta typo
2019-08-08 David Shahecp5: Replace '-dsp' with inverse logic '-nodsp' to...
2019-08-08 David Shahecp5: Bring up to date with mul2dsp changes
2019-08-08 David ShahMerge branch 'xc7dsp' of github.com:YosysHQ/yosys into...
2019-08-08 David ShahDSP48E1 sim model: add SIMD tests
2019-08-08 David ShahDSP48E1 model: test CE inputs
2019-08-08 David ShahDSP48E1 sim model: fix seq tests and add preadder tests
2019-08-08 David ShahDSP48E1 sim model: seq test working
2019-08-08 David ShahDSP48E1 sim model: Comb, no pre-adder, mode working
2019-08-08 David Shah[wip] sim model testing
2019-08-08 David Shah[wip] sim model testing
2019-08-07 Eddie HungFix compile error
2019-08-07 Eddie HungRun "opt_expr -fine" instead of "wreduce" due to #1213
2019-08-07 Eddie HungDo not SigSpec::extract() beyond bounds
2019-08-07 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-08-07 Eddie HungDo not pack registers if (* keep *)
2019-08-07 Eddie HungMerge pull request #1248 from YosysHQ/eddie/abc9_speedup
2019-08-07 Eddie HungAdd comment
2019-08-07 Eddie HungRevert "Add TODO"
2019-08-07 Eddie HungAdd TODO
2019-08-07 Eddie HungCompute box_lookup just once
2019-08-07 Eddie HungRun "clean" on mapped_mod in its own design
2019-08-07 Eddie HungRun "clean -purge" on holes_module in its own design
2019-08-07 David ShahMerge pull request #1260 from YosysHQ/dave/ecp5_cell_fixes
2019-08-07 David Shahecp5: Make cells_sim.v consistent with nextpnr
2019-08-07 Clifford WolfMerge pull request #1213 from YosysHQ/eddie/wreduce_add
2019-08-07 David Shah[wip] DSP48E1 sim model improvements
2019-08-07 Clifford WolfMerge pull request #1240 from ucb-bar/firrtl-properties...
2019-08-07 Clifford WolfMerge pull request #1249 from mmicko/anlogic_fix
2019-08-07 Clifford WolfMerge pull request #1252 from YosysHQ/clifford/fix1231
2019-08-07 Clifford WolfMerge pull request #1253 from YosysHQ/clifford/check
2019-08-07 Clifford WolfMerge pull request #1257 from YosysHQ/clifford/cellcosts
2019-08-07 David ShahUpdate CHANGELOG
2019-08-07 David ShahMerge pull request #1241 from YosysHQ/clifford/jsonfix
2019-08-07 Clifford WolfTweak default gate costs, cleanup "stat -tech cmos"
2019-08-06 Clifford WolfRedesign of cell cost API
2019-08-06 Eddie HungAdd signed opt_expr tests
2019-08-06 Eddie HungAdd signed test
2019-08-06 Eddie HungMove LSB-trimming functionality from wreduce to opt_expr
2019-08-06 Eddie HungAdd SigSpec::extract_end() convenience function
2019-08-06 Eddie HungRestore original SigSpec::extract()
2019-08-06 Eddie HungMove LSB tests from wreduce to opt_expr
2019-08-06 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-08-06 David ShahMerge pull request #1232 from YosysHQ/dave/write_gzip
2019-08-06 David Shah[wip] DSP48E1 sim model improvements
2019-08-06 Clifford WolfBe less aggressive with running design->check()
2019-08-06 David ShahAdd test for writing gzip-compressed files
2019-08-06 David ShahAdd support for writing gzip-compressed files
2019-08-06 Clifford WolfFix handling of functions/tasks without top-level begin...
2019-08-06 Clifford WolfMerge pull request #1251 from YosysHQ/clifford/nmux
2019-08-06 David Shah[wip] DSP48E1 sim model improvements
2019-08-06 Clifford WolfAdd $_NMUX_, add "abc -g cmos", add proper cmos cell...
2019-08-03 Miodrag Milanovicanlogic : Fix alu mapping
2019-08-03 whitequarkMerge pull request #1242 from jfng/fix-proc_prune-partial
2019-08-02 Clifford WolfMerge pull request #1238 from mmicko/vsbuild_fix
2019-08-02 Clifford WolfMerge pull request #1239 from mmicko/mingw_fix
2019-08-01 Eddie HungAdd comment about supporting $dffe in ice40_dsp
2019-08-01 Eddie HungPack P register properly
2019-08-01 Eddie HungTrim Y_WIDTH
2019-08-01 Eddie HungAdd DSP_SIGNEDONLY back
2019-08-01 Eddie HungDSP_MINWIDTH -> DSP_{A,B,Y}_MINWIDTH
2019-08-01 Eddie HungChange $__softmul back to $mul
2019-08-01 Eddie HungCope with sign extension in mul2dsp
2019-08-01 Eddie HungRevert "Do not do sign extension in techmap; let packer...
2019-08-01 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-08-01 Eddie HungFix B_WIDTH > DSP_B_MAXWIDTH case
2019-08-01 Eddie HungCO is sign extension only if signed multiplier
2019-08-01 Eddie HungFix typo
2019-08-01 Eddie HungMerge pull request #1236 from YosysHQ/eddie/xc6s_brams_map
2019-08-01 Miodrag MilanovicFix linking issue for new mxe and pthread
2019-08-01 Miodrag MilanovicFix yosys linking for mxe
2019-08-01 Miodrag MilanovicNew mxe hacks needed to support 2ca237e
2019-08-01 Miodrag MilanovicFix formatting for msys2 mingw build using GetSize
2019-08-01 Jean-François... proc_prune: Promote partially redundant assignments.
2019-08-01 Clifford WolfUpdate JSON front-end to process new attr/param encoding
2019-08-01 Clifford WolfImplement improved JSON attr/param encoding
2019-07-31 Eddie HungDo not compute sign bit if result is zero
2019-07-31 Eddie HungFor signed multipliers, compute sign bit separately...
2019-07-31 Eddie HungRestore old CO behaviour
2019-07-31 Eddie HungHelper: SigSpec::operator[] to accept negative indices
2019-07-31 Jim LawsonSupport explicit FIRRTL properties for better accommoda...
2019-07-31 Clifford WolfMerge pull request #1233 from YosysHQ/clifford/defer
2019-07-31 Miodrag MilanovicVisual Studio build fix
2019-07-30 Jim LawsonMerge remote-tracking branch 'upstream/master'
2019-07-29 Eddie HungRST -> RSTBRST for RAMB8BWER
2019-07-29 Eddie HungMerge pull request #1228 from YosysHQ/dave/yy_buf_size
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