yosys.git
2019-07-09 Clifford WolfMerge pull request #1175 from whitequark/write_verilog...
2019-07-09 Eddie HungMerge pull request #1171 from YosysHQ/revert-1166-eddie...
2019-07-09 whitequarkwrite_verilog: fix placement of case attributes. NFC.
2019-07-09 Eddie HungMerge pull request #1170 from YosysHQ/eddie/fix_double_...
2019-07-09 Eddie HungRevert "Add "synth -keepdc" option"
2019-07-09 Eddie HungRename __builtin_bswap32 -> bswap32
2019-07-09 Clifford WolfMerge pull request #1168 from whitequark/bugpoint-processes
2019-07-09 Clifford WolfMerge pull request #1169 from whitequark/more-proc...
2019-07-09 Clifford WolfMerge pull request #1163 from whitequark/more-case...
2019-07-09 Clifford WolfMerge pull request #1162 from whitequark/rtlil-case...
2019-07-09 Clifford WolfMerge pull request #1167 from YosysHQ/eddie/xc7srl_cleanup
2019-07-09 whitequarkproc_prune: promote assigns to module connections when...
2019-07-09 whitequarkproc_prune: new pass.
2019-07-09 whitequarkbugpoint: add -assigns and -updates options.
2019-07-09 whitequarkproc_clean: add -quiet option.
2019-07-09 Eddie HungMerge pull request #1166 from YosysHQ/eddie/synth_keepdc
2019-07-09 Eddie HungMerge branch 'master' of github.com:YosysHQ/yosys
2019-07-09 Eddie HungClarify script -scriptwire doc
2019-07-09 Eddie HungAdd synth -keepdc to CHANGELOG
2019-07-09 Eddie HungClarify 'wreduce -keepdc' doc
2019-07-09 Eddie HungAdd synth -keepdc option
2019-07-08 Eddie HungMerge pull request #1164 from YosysHQ/eddie/muxcover_mux2
2019-07-08 David ShahMerge pull request #1160 from ZirconiumX/cyclone_v
2019-07-08 Eddie HungUpdate muxcover doc as per @ZirconiumX
2019-07-08 Eddie Hungatoi -> stoi
2019-07-08 Eddie HungAdd muxcover -mux2=cost option
2019-07-08 whitequarkverilog_backend: dump attributes on SwitchRule.
2019-07-08 whitequarkproc_mux: consider \src attribute on CaseRule.
2019-07-08 whitequarkverilog_backend: dump attributes on CaseRule, as comments.
2019-07-08 whitequarkgenrtlil: emit \src attribute on CaseRule.
2019-07-08 whitequarkAllow attributes on individual switch cases in RTLIL.
2019-07-07 Dan Ravensloftsynth_intel: Warn about untested Quartus backend
2019-07-05 Clifford WolfMerge pull request #1159 from btut/fix/1090_segfault_ce...
2019-07-04 Benedikt TutzerThrow runtime exception when trying to convert a c...
2019-07-03 Eddie HungMerge pull request #1156 from YosysHQ/eddie/fix_abc9_un...
2019-07-03 Clifford WolfMerge pull request #1147 from YosysHQ/clifford/fix1144
2019-07-03 Clifford WolfFix tests/various/specify.v
2019-07-03 Clifford WolfSome cleanups in "ignore specify parser"
2019-07-03 Clifford WolfMerge pull request #1154 from whitequark/manual-sync...
2019-07-03 Eddie Hungwrite_xaiger to treat unknown cell connections as keep-s
2019-07-03 Eddie HungAdd test
2019-07-02 Eddie HungMerge pull request #1150 from YosysHQ/eddie/script_from...
2019-07-02 whitequarkmanual: explain the purpose of `sync always`.
2019-07-02 Eddie HungMerge branch 'eddie/script_from_wire' into eddie/xc7srl...
2019-07-02 David ShahMerge pull request #1153 from YosysHQ/dave/fix_multi_mux
2019-07-02 Eddie HungUpdate test for Pass::call_on_module()
2019-07-02 Eddie HungUse Pass::call_on_module() as per @cliffordwolf comments
2019-07-02 Eddie HungUpdate test too
2019-07-02 Eddie Hungscript -select -> script -scriptwire
2019-07-02 David Shahmemory_dff: Fix checking of feedback mux input when...
2019-07-02 Clifford WolfFix read_verilog assert/assume/etc on default case...
2019-07-01 Eddie HungSpace
2019-07-01 Eddie HungMove CHANGELOG entry from yosys-0.8 to 0.9
2019-07-01 Eddie HungMerge branch 'master' into eddie/script_from_wire
2019-07-01 Eddie HungMove abc9 from yosys-0.8 to yosys-0.9 in CHANGELOG
2019-07-01 Eddie HungMerge branch 'master' of github.com:YosysHQ/yosys
2019-06-30 Eddie HungComment out invalid syntax
2019-06-30 Eddie HungCleanup SRL inference/make more consistent
2019-06-30 Eddie Hunginstall *_nowide.lut files
2019-06-28 Eddie HungMerge pull request #1149 from gsomlo/gls-1098-abcext...
2019-06-28 Eddie HungMerge branch 'master' into eddie/script_from_wire
2019-06-28 Eddie Hungautotest.sh to define _AUTOTB when test_autotb
2019-06-28 Eddie HungTry command in another module
2019-06-28 Eddie HungAdd to CHANGELOG
2019-06-28 Eddie HungSupport ability for "script -select" to take commands...
2019-06-28 Eddie HungAdd test
2019-06-28 Eddie HungReplace log_assert() with meaningful log_error()
2019-06-28 Eddie HungRemove peepopt call in synth_xilinx since already in...
2019-06-28 Gabriel L.... Make abc9 pass aware of optional ABCEXTERNAL override
2019-06-28 Eddie HungAdd missing CHANGELOG entries
2019-06-28 Eddie HungFix spacing
2019-06-28 Eddie HungMerge pull request #1098 from YosysHQ/xaig
2019-06-28 Eddie HungAdd test from #1144, and try reading without '-specify...
2019-06-28 Eddie HungAdd generic __builtin_bswap32 function
2019-06-28 Eddie HungAlso fix write_aiger for UB
2019-06-28 Eddie HungFix more potential for undefined behaviour due to conta...
2019-06-28 Eddie HungUpdate synth_ice40 -device doc to be relevant for ...
2019-06-28 Eddie HungDisable boxing of ECP5 dist RAM due to regression
2019-06-28 Eddie HungAdd write address to abc_scc_break of ECP5 dist RAM
2019-06-28 Eddie HungFix DO4 typo
2019-06-28 Clifford WolfMerge pull request #1146 from gsomlo/gls-test-abc-ext
2019-06-28 Clifford WolfImprove specify dummy parser, fixes #1144
2019-06-28 Clifford WolfMerge pull request #1046 from bogdanvuk/master
2019-06-28 Gabriel L.... tests: use optional ABCEXTERNAL when specified
2019-06-27 Eddie HungReduce diff with upstream
2019-06-27 Eddie HungExtraneous newline
2019-06-27 Eddie HungRemove noise from ice40/cells_sim.v
2019-06-27 Eddie HungRefactor for one "abc_carry" attribute on module
2019-06-27 Eddie HungMerge branch 'xaig' of github.com:YosysHQ/yosys into...
2019-06-27 Eddie HungDo not use Module::remove() iterator version
2019-06-27 Eddie HungRemove redundant doc
2019-06-27 Eddie HungRemove &retime when abc9 -fast
2019-06-27 Eddie HungCleanup abc9.cc
2019-06-27 Eddie HungUndo iterator based Module::remove() for cells, as...
2019-06-27 Bogdan VukobratovicAdd help for "-sat" option inside opt_rmdff. "opt"...
2019-06-27 Bogdan VukobratovicFix memory leak when one of multiple DFF cells is remov...
2019-06-27 Eddie HungMerge remote-tracking branch 'origin/master' into xaig
2019-06-27 Eddie HungMerge pull request #1139 from YosysHQ/dave/check-sim...
2019-06-27 Eddie HungMerge remote-tracking branch 'origin/master' into xaig
2019-06-27 Eddie HungGrr
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