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nmigen.git
2020-02-01 whitequarkhdl.dsl: don't allow inheriting from Module. commit | commitdiff | tree
2020-02-01 whitequarkhdl.ast: warn on unused property statements (Assert... commit | commitdiff | tree
2020-02-01 whitequark_unused: extract must-use logic from hdl.ir. commit | commitdiff | tree
2020-01-31 whitequarkhdl.dsl: add missing case width check for Enum values. commit | commitdiff | tree
2020-01-31 whitequarkREADME: clarify relationship to Migen. commit | commitdiff | tree
2020-01-31 whitequarkhdl.dsl: make `if m.{If,Elif,Else}(...)` a syntax error. commit | commitdiff | tree
2020-01-31 whitequarkback.rtlil: don't emit wires for empty signals. commit | commitdiff | tree
2020-01-31 Mike Waltersvendor.lattice_ecp5: support internal oscillator (OSCG). commit | commitdiff | tree
2020-01-31 Jaro Habigerbuild.dsl: allow strings to be used as connector numbers. commit | commitdiff | tree
2020-01-31 Sylvain Munautvendor.lattice_{ice40,ecp5}: Support .il (RTLIL) files... commit | commitdiff | tree
2020-01-27 whitequarkUpdate README. commit | commitdiff | tree
2020-01-18 whitequarkhdl.ir: resolve hierarchy conflicts before creating... commit | commitdiff | tree
2020-01-17 whitequarkhdl.xfrm: transform drivers as well in DomainRenamer. commit | commitdiff | tree
2020-01-12 whitequarkRemove everything deprecated in nmigen 0.1. commit | commitdiff | tree
2020-01-11 Staf VerhaegenSignal: allow to use integral Enum for reset value. commit | commitdiff | tree
2020-01-09 schwigivendor.intel: fix output enable width for XDR=0 case. commit | commitdiff | tree
2020-01-07 Alain Péteutbuild.run: fix indentation. commit | commitdiff | tree
2020-01-01 whitequarkback.rtlil: do not consider unreachable array elements... commit | commitdiff | tree
2019-12-15 whitequarkhdl.mem: fix src_loc_at in ReadPort, WritePort. commit | commitdiff | tree
2019-12-04 Marcin Kościelnickihdl.ast: Fix width for unary minus operator on signed... commit | commitdiff | tree
2019-12-02 whitequarkback.pysim: fix miscompilation of Signal(unsigned)... commit | commitdiff | tree
2019-12-02 whitequarkhdl.ast: actually remove simulator commands. commit | commitdiff | tree
2019-12-01 Dan Ravensloftvendor.intel: silence meaningless warnings in nMigen... commit | commitdiff | tree
2019-11-28 whitequarkback.pysim: redesign the simulator. commit | commitdiff | tree
2019-11-27 whitequarkback.rtlil: infer bit width for instance parameters. commit | commitdiff | tree
2019-11-26 whitequarkhdl.ir: for instance ports, prioritize defs over uses. commit | commitdiff | tree
2019-11-18 Jean-François... vendor.xilinx_*: Set IOB attribute on cels instead... commit | commitdiff | tree
2019-11-18 whitequarkback.rtlil: extend shorter operand of a binop when... commit | commitdiff | tree
2019-11-15 whitequarkbuild.plat: in Platform.add_file(), allow adding exact... commit | commitdiff | tree
2019-11-15 whitequarktest: add tests for build.plat.Platform.add_file. commit | commitdiff | tree
2019-11-09 whitequarkhdl.rec: fix Record.like() being called through a subclass. v0.1 commit | commitdiff | tree
2019-11-09 Staf Verhaegenhdl.rec: make Record(name=) keyword-only. commit | commitdiff | tree
2019-11-07 whitequarkhdl.ir: lower domains before resolving hierarchy conflicts. commit | commitdiff | tree
2019-11-02 whitequarkImprove .gitignore. commit | commitdiff | tree
2019-10-28 whitequarkback.verilog: remove $verilog_initial_trigger after... commit | commitdiff | tree
2019-10-26 whitequarktest: use `#nmigen:` magic comment instead of monkey... commit | commitdiff | tree
2019-10-26 whitequarkhdl.ir: allow disabling UnusedElaboratable warning... commit | commitdiff | tree
2019-10-26 whitequarkback.rtlil: avoid exponential behavior when legalizing... commit | commitdiff | tree
2019-10-26 whitequarkback.rtlil: fix lowering of Part() on LHS to account... commit | commitdiff | tree
2019-10-26 whitequarkhdl.ast: simplify {bit,word}_select with constant offset. commit | commitdiff | tree
2019-10-21 whitequarkExplicitly restrict prelude imports. commit | commitdiff | tree
2019-10-17 whitequarkcompat.fhdl.specials: fix argument parsing compatibility. commit | commitdiff | tree
2019-10-16 whitequarklib.io: use keyword-only arguments in Pin(). commit | commitdiff | tree
2019-10-16 whitequarksetup: fix commit 5198d99b. commit | commitdiff | tree
2019-10-16 Sebastien Bourdeauducqverilog: fix yosys version error message commit | commitdiff | tree
2019-10-16 whitequarkback.verilog: fix Yosys version check. commit | commitdiff | tree
2019-10-15 whitequarksetup: don't append local version for tags. v0.1rc1 commit | commitdiff | tree
2019-10-14 whitequarkvendor.lattice_ice40: fix commit 88649def. commit | commitdiff | tree
2019-10-13 whitequarkvendor.lattice_{ice40,ecp5}: fix typo. commit | commitdiff | tree
2019-10-13 whitequarkvendor.lattice_ice40: use pcf files instead of pre... commit | commitdiff | tree
2019-10-13 whitequarkbuild.plat: batch files use EQU, not EQ. commit | commitdiff | tree
2019-10-13 whitequark{,_}tools→{,_}utils commit | commitdiff | tree
2019-10-13 whitequarkvendor.lattice_{ice40,ecp5}: emit Verilog as well,... commit | commitdiff | tree
2019-10-13 whitequarkbuild.plat: fold emit_prelude() into emit_commands(). commit | commitdiff | tree
2019-10-13 EmilyRefactor build script toolchain lookups. commit | commitdiff | tree
2019-10-13 whitequarkhdl.ir: allow ClockSignal and ResetSignal in ports. commit | commitdiff | tree
2019-10-13 whitequarkhdl.ir: cast instance port connections to Values. commit | commitdiff | tree
2019-10-13 whitequarkcompat.fhdl.decorators: improve backwards compatibility. commit | commitdiff | tree
2019-10-13 whitequarkcompat.fhdl.bitcontainer: update Value.wrap call. commit | commitdiff | tree
2019-10-12 whitequarkdoc: bring COMPAT_SUMMARY up to date. commit | commitdiff | tree
2019-10-12 whitequarkcompat.genlib.fsm: add migration warning. commit | commitdiff | tree
2019-10-12 whitequarkcompat.fhdl.decorators: add migration warnings. commit | commitdiff | tree
2019-10-12 whitequarkhdl.ast: rename Slice.end back to Slice.stop. commit | commitdiff | tree
2019-10-12 whitequarkcompat.fhdl.structure: remove SPECIAL_* constants. commit | commitdiff | tree
2019-10-12 whitequark_tools: extract most utility methods to a private package. commit | commitdiff | tree
2019-10-12 Jean-François... back.rtlil: fix DeprecationWarning. NFC. commit | commitdiff | tree
2019-10-11 whitequarkRename remaining `wrap` methods to `cast`. commit | commitdiff | tree
2019-10-11 whitequarkhdl.ast: deprecate shapes like `(1, True)` in favor... commit | commitdiff | tree
2019-10-11 whitequarkhdl.ast: deprecate Signal.{range,enum}. commit | commitdiff | tree
2019-10-11 whitequarkhdl.ast: add an explicit Shape class, included in prelude. commit | commitdiff | tree
2019-10-11 whitequarkConsistently use {!r}, not '{!r}' in diagnostics. commit | commitdiff | tree
2019-10-11 whitequarkhdl.ast: Operator.{op→operator} commit | commitdiff | tree
2019-10-11 whitequarkhdl.ast: simplify enum handling. commit | commitdiff | tree
2019-10-11 whitequarkhdl.ast: Value.{wrap→cast} commit | commitdiff | tree
2019-10-10 whitequarkvendor.xilinx_ultrascale: new supported family. commit | commitdiff | tree
2019-10-10 whitequarkxilinx_7series: add grade platform property. commit | commitdiff | tree
2019-10-10 whitequarkvendor.lattice_machxo2: new supported family. commit | commitdiff | tree
2019-10-10 whitequarkvendor: yosys is a required tool for all Verilog-based... commit | commitdiff | tree
2019-10-10 whitequarkREADME: add device support matrix. commit | commitdiff | tree
2019-10-10 whitequarkvendor.intel: add Quartus support. commit | commitdiff | tree
2019-10-09 whitequarkexamples: update blinky, add some explanatory text... commit | commitdiff | tree
2019-10-09 whitequarkbuild.plat: elaborate result of create_missing_domain... commit | commitdiff | tree
2019-10-09 whitequarkbuild.plat: don't create default sync domain as reset... commit | commitdiff | tree
2019-10-09 whitequarkbuild.plat,vendor: always synchronize reset in default... commit | commitdiff | tree
2019-10-06 whitequarkback.rtlil: don't crash legalizing values with no branches. commit | commitdiff | tree
2019-10-04 whitequarkback.rtlil: avoid unsoundness for division by zero. commit | commitdiff | tree
2019-10-04 whitequarkhdl.ast: prohibit signed divisors. commit | commitdiff | tree
2019-10-03 whitequarkbuild.dsl: accept Pins(invert=True). commit | commitdiff | tree
2019-10-02 whitequarkhdl.ast: don't crash on Mux(<bool>, ...). commit | commitdiff | tree
2019-10-02 whitequarkback.rtlil: don't cache wires for legalized switch... commit | commitdiff | tree
2019-10-02 whitequarkback.rtlil: sign of rhs and lhs of ${sshr,sshl,pow... commit | commitdiff | tree
2019-10-02 whitequarkback.rtlil: it is not necessary to match binop operand... commit | commitdiff | tree
2019-09-30 Jean-François... rpc: add public Records as module ports. commit | commitdiff | tree
2019-09-30 whitequarkrpc: add support for Yosys RPC protocol. commit | commitdiff | tree
2019-09-28 whitequarkhdl.ast: actually implement the // operator. commit | commitdiff | tree
2019-09-28 whitequarkhdl.dsl: add a diagnostic for `m.d.submodules += ...`. commit | commitdiff | tree
2019-09-28 whitequarkhdl.mem: remove WritePort(priority=) argument. commit | commitdiff | tree
2019-09-24 whitequarkback.rtlil: fix handling of certain nested arrays. commit | commitdiff | tree
2019-09-24 whitequarkbuild.plat: strip internal attributes from Verilog... commit | commitdiff | tree
2019-09-24 whitequarkbuild.plat,lib.cdc,vendor: unify platform related diagn... commit | commitdiff | tree
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