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openpower-isa.git
2022-02-28
Dmitry Selyutin
openpower.const: switch to enum class
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2022-02-28
Dmitry Selyutin
sv_binutils: use metaclass for enumerations
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2022-02-28
Luke Kenneth...
add default XLEN=64 as temporary hack
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2022-02-28
Luke Kenneth...
hmm something wrong with negative branch
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2022-02-24
Jacob Lifshay
add rldimi test case
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2022-01-31
Dmitry Selyutin
sv_binutils: consider RC
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2022-01-31
Dmitry Selyutin
sv_binutils: refactor parsing
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2022-01-31
Dmitry Selyutin
sv_binutils: drop obsolete code
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2022-01-29
Dmitry Selyutin
Revert "sv_binutils: introduce per-record validity...
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2022-01-29
Dmitry Selyutin
sv_binutils: introduce per-record validity flag
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2022-01-29
Dmitry Selyutin
sv_binutils: mark already visited instructions
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2022-01-29
Dmitry Selyutin
sv_binutils: drop opcode structure
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2022-01-28
Luke Kenneth...
rename wb_get_classic
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2022-01-24
Luke Kenneth...
doh, self.srr1 not srr1 (local variable)
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2022-01-24
Luke Kenneth...
blech, add horrible hack: a length parameter to LDSTExc...
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2022-01-24
Luke Kenneth...
remove read of SRR1 for TRAP pipeline, pass via LDSTExc...
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2022-01-24
Luke Kenneth...
add SRR1 to LDSTException
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2022-01-24
Luke Kenneth...
add extra bc regression test
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2022-01-23
Dmitry Selyutin
sv_binutils: split svp64_record structure (bits only)
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2022-01-23
Dmitry Selyutin
sv_binutils: consider opcode whenever names match
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2022-01-23
Dmitry Selyutin
sv_binutils: split insns by names
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2022-01-23
Dmitry Selyutin
sv_binutils: determine the longest name
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2022-01-23
Dmitry Selyutin
sv_binutils: fix ppc-svp64-opc.c contents
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2022-01-23
Dmitry Selyutin
sv_binutils: fix _missing_ enum method
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2022-01-23
Dmitry Selyutin
sv_binutils: follow binutils coding style
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2022-01-23
Dmitry Selyutin
sv_binutils: output header guard
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2022-01-23
Dmitry Selyutin
sv_binutils: follow binutils naming convention for...
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2022-01-21
Luke Kenneth...
add test for setting TB SPR, fix decode map for STATE...
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2022-01-19
Luke Kenneth...
trap types memory exception (TT.MEMEXC) instead of...
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2022-01-19
Dmitry Selyutin
sv_binutils: fix link to script in disclaimer
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2022-01-19
Luke Kenneth...
add spr-to-state conversion, and support for state1...
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2022-01-18
Luke Kenneth...
see soc/fu/trap/main_stage.py trap() function, and:
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2022-01-18
Jacob Lifshay
grev[w][i][.] pseudo-code works
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2022-01-18
Jacob Lifshay
add log2 pseudo-code helper
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2022-01-18
Jacob Lifshay
format code
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2022-01-18
Jacob Lifshay
add test_caller_logical.py
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2022-01-18
Jacob Lifshay
Merge branch 'master' of ssh://git.libre-soc.org:922...
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2022-01-18
Jacob Lifshay
speed up pywriter
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2022-01-17
Luke Kenneth...
add a couple of trap pipeline unit tests
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2022-01-17
Jacob Lifshay
WIP speed up pywriter by caching stuff more and not...
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2022-01-16
Dmitry Selyutin
sv_binutils: fix typo in disclaimer
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2022-01-16
Dmitry Selyutin
sv_binutils: add missing include directives
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2022-01-16
Dmitry Selyutin
sv_binutils: introduce SVP64 entries
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2022-01-16
Dmitry Selyutin
sv_binutils: rename Field into CType
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2022-01-16
Dmitry Selyutin
sv_binutils: inherit Entry from Field
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2022-01-16
Dmitry Selyutin
sv_binutils: drop semicolons in c_var methods
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2022-01-15
Luke Kenneth...
correctly identify atomic reservation CSV file field and
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2022-01-15
Luke Kenneth...
add atomic reservation field to Power Decoder data...
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2022-01-14
Jacob Lifshay
remove stray newline
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2022-01-14
Jacob Lifshay
add grev[w][i][.] pseudo-code
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2022-01-12
Luke Kenneth...
add second version of wb_get which can cope with pipelines
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2022-01-10
Luke Kenneth...
increase addr_wid to 64 in TestRunnerBase. hm this...
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2022-01-10
Luke Kenneth...
enable privileged-instruction detection which had previ...
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2022-01-09
Dmitry Selyutin
sv_binutils: drop redundant imports
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2022-01-09
Dmitry Selyutin
sv_binutils: sort entries by name
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2022-01-09
Dmitry Selyutin
sv_binutils: discard VHDL stuff in comments
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2022-01-09
Dmitry Selyutin
sv_binutils: calculate reserved bits
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2022-01-09
Dmitry Selyutin
sv_binutils: reorder declarations
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2022-01-09
Dmitry Selyutin
sv_binutils: print opcode as hexadecimal
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2022-01-06
Jacob Lifshay
add grev[w][i] instructions
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2022-01-06
Jacob Lifshay
format code
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2022-01-06
Jacob Lifshay
add stand-alone simulator bitmanip test
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2022-01-06
Luke Kenneth...
add tlbsync and wait as NOPs
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2022-01-05
Luke Kenneth...
add eieio instruction as a NOP to minor 31 csv
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2022-01-05
Luke Kenneth...
add lbzcix instruction which had been completely forgot...
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2022-01-05
Dmitry Selyutin
sv_binutils: introduce real opcode class
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2022-01-05
Dmitry Selyutin
sv_binutils: parse CSVs directly
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2022-01-05
Dmitry Selyutin
sv_binutils: support basic header generation
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2022-01-05
Dmitry Selyutin
sv_binutils: introduce code generator class
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2022-01-05
Dmitry Selyutin
sv_binutils: use stdin as input stream
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2022-01-05
Dmitry Selyutin
sv_binutils: introduce helper classes
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2022-01-03
Luke Kenneth...
copy over msr and rename cia to nia in PowerDecoder2
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2021-12-28
Cesar Strauss
Add an inorder flag to pspec
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2021-12-27
Luke Kenneth...
add empty default_mem for running without MMU
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2021-12-27
Luke Kenneth...
whoops wrong parameter name
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2021-12-27
Luke Kenneth...
quick attempt to fix test_decoder_gas.py (did not work)
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2021-12-27
Mikolaj Wielgus
bool() is !!() for integers
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2021-12-27
Mikolaj Wielgus
Add missing parentheses for explicit operator precedence
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2021-12-26
Luke Kenneth...
add very basic PowerDecode2 test which at least gets...
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2021-12-26
Luke Kenneth...
a few extra things discovered needing c syntax not...
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2021-12-26
Mikolaj Wielgus
Give human-readable names to slots, run functions and...
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2021-12-25
Mikolaj Wielgus
Put CRTL CFFI modules in crtl dir
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2021-12-25
Dmitry Selyutin
sv_binutils: provide small comment on regex
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2021-12-25
Dmitry Selyutin
sv_binutils: introduce entry dataclass
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2021-12-24
Luke Kenneth...
clear memory is optional
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2021-12-24
Luke Kenneth...
whoops forgot to put the copy of the wb_get memory...
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2021-12-23
Luke Kenneth...
code cleanup / comments
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2021-12-23
Luke Kenneth...
repeat power decode test to check performance
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2021-12-23
Luke Kenneth...
bit of a tidyup of crtl:
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2021-12-23
Luke Kenneth...
add load-store byte-reverse 64-bit unit test
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2021-12-23
Mikolaj Wielgus
Add CRTL templates
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2021-12-23
Mikolaj Wielgus
Give unique names to CRTL-generated modules
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2021-12-23
Mikolaj Wielgus
Move "pending" set to C
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2021-12-22
Mikolaj Wielgus
Make _PySignalState CRTL-aware
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2021-12-21
Luke Kenneth...
take a copy of the wb_get memory and then for each...
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2021-12-21
Luke Kenneth...
ISACaller (actually RADIXMMU) only do virtual memory...
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2021-12-20
Mikolaj Wielgus
Generate variable declaration in some missing places
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2021-12-20
Luke Kenneth...
create header/footer for crtl code-generation
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2021-12-20
Luke Kenneth...
whoops forgot to trap if non-execute (instruction)...
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2021-12-19
Luke Kenneth...
TODO notes for executing ISACaller Invalid Instruction...
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