openpower-isa.git
2023-06-02 Jacob Lifshayverify fields.txt forms' field separators ('|') line...
2023-06-02 Konstantinos... merge maddrs/msubrs, unit tests changed accordingly
2023-06-02 Konstantinos... Add 2 more instructions to help with 2-coeff butterfly
2023-06-02 Konstantinos... use a simpler way to do the same thing
2023-06-02 Konstantinos... Handle large 64-bit values, but only the low 64-bit...
2023-06-02 Konstantinos... do proper rounding, no rounding for SH=0 (for now)...
2023-06-02 Konstantinos... Result needs rounding so add +1 to prod*
2023-06-02 Konstantinos... handle negatives correctly by adding sign bit to final...
2023-06-02 Konstantinos... almost there, positive values work, negative values...
2023-06-02 Konstantinos... use proper register sizes
2023-06-02 Konstantinos... MULS instead of MUL, RA instead of RT in in1
2023-06-02 Konstantinos... Turns out DCTI-Form is another variant of A-Form
2023-06-02 Konstantinos... minor fixes in pseudocode, CONST_UI->CONST_SH in minor_...
2023-06-02 Konstantinos... WIP: maddsubrs initial approach
2023-06-02 Luke Kenneth... maddsubrs no longer has CR0
2023-06-02 Jacob Lifshayfix forgotten stuff from last commit
2023-06-02 Jacob Lifshayadd fcvt/fmv -- no tests yet
2023-06-02 Jacob Lifshaysupport calling functions with no args in pseudocode
2023-06-02 Jacob Lifshayshow actual mdwn source location in backtrace when...
2023-06-02 Jacob Lifshaymove Assign to parser class in prep for improving synta...
2023-06-02 Jacob Lifshayadd all fmv*/fcvt* fields
2023-06-02 Jacob Lifshaysplit XO-Form's RA field in prep for adding fcvttg...
2023-06-02 Jacob Lifshayremove testing with INSNDB=true since that now does...
2023-06-02 Jacob Lifshaycomment fmin*/fmax* since they're being replaced with...
2023-06-02 Jacob Lifshayfix non-zero assembly operands being zero
2023-06-02 Jacob Lifshayupdate SV csvs
2023-06-02 Luke Kenneth... add links between decode and issue
2023-06-02 Luke Kenneth... reserve writes in Issue Phase, add comment
2023-06-02 Luke Kenneth... add Issue phase and writes/reads possible in CPU
2023-06-02 Luke Kenneth... add Decode and CPU classes
2023-06-02 Luke Kenneth... add quick preamble header
2023-06-02 Luke Kenneth... update comments and correct retiring, remove registers...
2023-06-02 Luke Kenneth... start on cycle-accurate model of inorder core
2023-06-02 Luke Kenneth... ffnmadds converted to 3-operand
2023-06-02 Luke Kenneth... converted ffnmadds to 3-operand
2023-06-02 Luke Kenneth... ffmsubs number of operands reduced to match ffmadds
2023-06-02 Dmitry Selyutinpower_insn: forbid zero for non-zero operands
2023-06-02 Dmitry Selyutinpower_insn: drop registers remapping hack
2023-06-02 Dmitry Selyutinpower_insn: support int and index opcode methods
2023-06-02 Luke Kenneth... reduce number of operands to ffmadds as well
2023-06-02 Jacob Lifshayprefix-sum remap works!
2023-06-02 Jacob Lifshaychange order to tuple in remap preduce tests/demos...
2023-06-02 Jacob Lifshayfix <u and >u with int arguments
2023-06-02 Luke Kenneth... reduce fdmadds down to only 3 operands, RT-overwrite...
2023-06-02 Luke Kenneth... add SVSHAPE setup for parallel/prefix but it refuses...
2023-06-02 Luke Kenneth... add implicit rs detection for maddsubrs
2023-06-02 Luke Kenneth... link in new parallel-prefix REMAP schedule
2023-06-02 Jacob Lifshayadd scan/prefix-sum support to copy of parallel-reduce...
2023-06-02 Jacob Lifshayformat remap_preduce_yield.py
2023-06-02 Dmitry Selyutinpower_insn: deprecate ff/pr common code
2023-06-02 Dmitry Selyutinpower_insn: deprecate PR specifier
2023-06-02 Dmitry Selyutinpower_insn: deprecate normal PR mode
2023-06-02 Dmitry Selyutinpysvp64dis: deprecate pr tests
2023-06-02 Dmitry Selyutinpysvp64asm: deprecate pr tests
2023-06-02 Dmitry Selyutinpower_enums: sync forms
2023-06-02 Luke Kenneth... add CW and CW2 Form
2023-06-02 Luke Kenneth... check RC1, add data-dependent fail-first LD/ST test
2023-06-02 Jacob Lifshayreplace min/max[su][.] with minmax[.]
2023-06-02 Jacob Lifshayadd unofficial and comment2 columns to minor_19.csv
2023-06-02 Jacob Lifshayadd MM-form
2023-06-02 Jacob Lifshayfix bug where pseudo-code assignments modify more than...
2023-06-02 Jacob Lifshayrename/convert/merge XLCASTU/XLCASTS to EXTZXL/EXTSXL
2023-06-02 Jacob Lifshayrewrite all uses of XLCASTU/XLCASTS
2023-06-02 Jacob Lifshayadd EXTZ since it's in PowerISA v3.1B (see lbz for...
2023-06-02 Jacob Lifshayfix EXTSXL/XLCASTU/XLCASTS when inputs are python ints
2023-06-02 Jacob Lifshayuse proper cast function
2023-06-02 Jacob Lifshaychange XLEN-ification
2023-06-02 Jacob Lifshaychange extsb/h/w to scale based on XLEN rather than...
2023-06-02 Jacob Lifshayadd shaddw
2023-06-02 Jacob Lifshayspelling fix
2023-06-02 Dmitry Selyutinmedia: migrate to binutils
2023-06-02 Dmitry Selyutinsv_binutils: fix broken script
2023-06-02 Luke Kenneth... add power_decode_svp64_rm.py capability for new LD...
2023-06-02 Luke Kenneth... add quick test_pysvp64dis.py of LD/ST data-dependent...
2023-06-02 Luke Kenneth... https://bugs.libre-soc.org/show_bug.cgi?id=1047
2023-06-02 Luke Kenneth... whitespace cleanup (80 char per line hard limit)
2023-06-02 Luke Kenneth... comment about massive unnecessary code-duplication...
2023-06-02 Luke Kenneth... fix setvl unit test which happened to use deprecated
2023-06-02 Jacob Lifshayfix add-like CA/OV outputs
2023-06-02 Jacob Lifshayfix broken test case
2023-06-02 Jacob Lifshayadd addex to simulator
2023-06-02 Jacob Lifshayfix typo when getting pseudo-code output variables
2023-06-02 Jacob Lifshayswitch to testing Rc=1 variants
2023-06-02 Jacob Lifshayfix `neg[o].` causing the simulator to raise TypeError
2023-06-02 Jacob Lifshayadd case_nego_
2023-06-02 Jacob Lifshayrename le -> lt since CR bits are lt, gt, eq, and so...
2023-06-02 Luke Kenneth... remove DCT/iDCT redundant modes which require less...
2023-06-02 Jacob Lifshayadd test cases for ca/ov outputs of a bunch of add...
2023-06-02 Jacob Lifshayadd check against PIA's output downloaded from ftp...
2023-06-02 Luke Kenneth... all whitespace. reduce to under 80 chars
2023-06-02 Luke Kenneth... update comments on svstep returning pack/unpack state
2023-06-02 Konstantinos... fix docs to align with recent change in setvl syntax...
2023-06-02 Luke Kenneth... whitespace - 80 char limit
2023-06-02 Luke Kenneth... in xchacha20 svp64 assembler remove r22 from setvl and
2023-06-02 Luke Kenneth... updated simplev setvl specification pseudocode: MAJOR...
2023-06-02 Luke Kenneth... whitespace
2023-06-02 Luke Kenneth... whoops added "CRB-Form" format not "CRB"
2023-06-02 Konstantinos... add .bin files to target
2023-06-02 Konstantinos... fix typo
2023-06-02 Konstantinos... and *.elf files
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