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microwatt.git
2020-06-23
Michael Neuling
Merge pull request #211 from shenki/spi-constraint
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2020-06-23
Joel Stanley
spi: Fix dat_i_l constraints
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2020-06-23
Michael Neuling
Merge pull request #210 from ozbenh/xics
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2020-06-22
Benjamin Herrenschmidt
xics: Add support for reduced priority field size
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2020-06-19
Benjamin Herrenschmidt
xics: Add simple ICS
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2020-06-19
Benjamin Herrenschmidt
xics/icp: MFRR starts at 0xff not 0x00
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2020-06-19
Benjamin Herrenschmidt
tests/xics: Ensure no compiler optimisations in delay()
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2020-06-19
Benjamin Herrenschmidt
xics: ICP should be big endian !
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2020-06-19
Benjamin Herrenschmidt
tests: Fix Makefile.test to not allow host includes
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2020-06-19
Michael Neuling
Merge pull request #208 from paulusmack/faster
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2020-06-17
Paul Mackerras
Merge pull request #207 from ozbenh/misc
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2020-06-16
Paul Mackerras
fpga: Add a xilinx_specific fileset to microwatt.core
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2020-06-16
Paul Mackerras
Make LOG_LENGTH configurable per FPGA variant
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2020-06-15
Paul Mackerras
execute1: Reduce width of the result mux to help timing
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2020-06-15
Paul Mackerras
core: Implement a simple branch predictor
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2020-06-15
Paul Mackerras
decode1: Improve timing for slow SPR decode path
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2020-06-14
Paul Mackerras
decode1: Add a stash buffer to the output
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2020-06-14
Benjamin Herrenschmidt
soc: Slight cleanup of IRQ assignments
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2020-06-14
Benjamin Herrenschmidt
soc: Rename uart_dat8 to uart0_dat8
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2020-06-14
Benjamin Herrenschmidt
soc: Rename wb_dram_ctrl to wb_ext_io and rework decoding
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2020-06-13
Paul Mackerras
dcache: Reduce back-to-back store latency from 3 cycles...
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2020-06-13
Benjamin Herrenschmidt
soc: Don't require dram wishbones signals to be wired...
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2020-06-13
Benjamin Herrenschmidt
soc: Add defaults for some input signals
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2020-06-13
Benjamin Herrenschmidt
soc: Remove unused RESET_LOW generic
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2020-06-13
Paul Mackerras
mmu: Take an extra cycle to do TLB invalidations
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2020-06-13
Paul Mackerras
dcache: Reduce latencies and improve timing
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2020-06-13
Paul Mackerras
decode: Work out ispr1/ispr2 in parallel with decode...
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2020-06-13
Paul Mackerras
loadstore1: Reduce busy cycles
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2020-06-13
Paul Mackerras
loadstore1: Complete mfspr/mtspr a cycle later
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2020-06-13
Paul Mackerras
core: Use a busy signal rather than a stall
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2020-06-13
Paul Mackerras
icache: Improve latencies when reloading cache lines
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2020-06-13
Paul Mackerras
multiply: Use DSP48 slices for multiplication on Xilinx...
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2020-06-13
Paul Mackerras
multiply: Move selection of result bits into execute1
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2020-06-13
Paul Mackerras
core: Double the dcache and icache sizes
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2020-06-13
Paul Mackerras
core: Remove fetch2 pipeline stage
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2020-06-13
Paul Mackerras
Add core logging
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2020-06-13
Paul Mackerras
scripts/mw_debug: Make progress counts display on one...
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2020-06-13
Paul Mackerras
tests/xics: Fix assumption that interrupts happen immed...
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2020-06-13
Paul Mackerras
register_file: Report value being written before assert...
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2020-06-13
Paul Mackerras
Merge pull request #205 from ozbenh/timing
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2020-06-13
Paul Mackerras
Merge pull request #204 from ozbenh/spi
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2020-06-13
Benjamin Herrenschmidt
syscon: Remove combinational loop on ack and stall
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2020-06-13
Benjamin Herrenschmidt
bram: Remove combinational loop on stall
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2020-06-13
Benjamin Herrenschmidt
uart: Remove combinational loops on ack and stall signal
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2020-06-13
Benjamin Herrenschmidt
spi: Add booting from flash to litedram init
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2020-06-13
Benjamin Herrenschmidt
spi: Add simulation support
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2020-06-12
Dan Horák
flash-arty: update error message (#203)
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2020-06-12
Benjamin Herrenschmidt
dmi: Add ASYNC_REG attribute on synchronizers (#200)
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2020-06-12
Benjamin Herrenschmidt
icache: Latch PLRU victim output (#199)
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2020-06-12
Paul Mackerras
Merge pull request #198 from ozbenh/litedram
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2020-06-12
Benjamin Herrenschmidt
spi: Add SPI Flash controller
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2020-06-12
Benjamin Herrenschmidt
litedram: L2 use latched refill_index
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2020-06-12
Benjamin Herrenschmidt
litedram: Pipeline store acks in L2
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2020-06-12
Benjamin Herrenschmidt
arty/nexys-video: Update XDC
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2020-06-12
Benjamin Herrenschmidt
litedram: Add stash buffer to the L2 cache wishbone...
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2020-06-12
Benjamin Herrenschmidt
litedram: Defer clearing of tags & valids to improve...
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2020-06-12
Benjamin Herrenschmidt
litedram: Improve dram_tb error output
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2020-06-12
Anton Blanchard
Merge pull request #201 from mikey/github-actions
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2020-06-11
Michael Neuling
Move from travis to github workflow
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2020-06-10
Paul Mackerras
Merge pull request #194 from ozbenh/misc
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2020-06-10
Benjamin Herrenschmidt
gitignore: Add more exlusions
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2020-06-10
Benjamin Herrenschmidt
litedram: Fix DRAM init mem using too many address...
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2020-06-10
Benjamin Herrenschmidt
litedram: Remove remnants of riscv-inits
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2020-06-10
Benjamin Herrenschmidt
mw_debug: Add "save" function to save memory to a file
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2020-06-10
Benjamin Herrenschmidt
sw: Properly mask syscon register fields
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2020-06-09
Michael Neuling
Merge pull request #196 from ozbenh/makefile-lib-fix
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2020-06-09
Michael Neuling
Merge pull request #195 from shenki/nexys-video
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2020-06-09
Benjamin Herrenschmidt
Makefile: Improve unisim library generation
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2020-06-09
Joel Stanley
flash-arty: Re-add support for running from any path
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2020-06-09
Joel Stanley
flash-arty: Support Nexys Video's a200
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2020-06-05
Michael Neuling
Merge pull request #193 from paulusmack/master
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2020-06-05
Paul Mackerras
Merge pull request #182 from mikey/travis
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2020-06-05
Benjamin Herrenschmidt
icache: Fix icbi potentially clobbering the icache...
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2020-06-05
Paul Mackerras
decode2: Reformat to 4-space indentation
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2020-06-05
Paul Mackerras
decode1: Reformat to 4-space indentation
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2020-06-05
Paul Mackerras
decode1: Make ld/std and lwa not be single-issue
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2020-06-05
Michael Neuling
Improve Travis to run as a matrix job
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2020-06-05
Michael Neuling
Add unit tests to check and check_light
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2020-06-05
Michael Neuling
Add unit tests make target
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2020-06-05
Michael Neuling
Add tests_console make target
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2020-06-05
Paul Mackerras
Merge pull request #191 from ozbenh/litedram
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2020-06-05
Benjamin Herrenschmidt
litedram: Make the L2 twice as tall
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2020-06-05
Paul Mackerras
core: Do addpcis using the main adder (#189)
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2020-06-05
Benjamin Herrenschmidt
litedram: Remove old "VexRiscV" based initializations
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2020-06-05
Paul Mackerras
Merge pull request #183 from shawnanastasio/addpcis
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2020-06-05
Benjamin Herrenschmidt
litedram: Update to latest LiteX/LiteDRAM version
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2020-06-05
Benjamin Herrenschmidt
litedram: Test bench
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2020-06-05
Benjamin Herrenschmidt
litedram: Add an L2 cache with store queue
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2020-06-05
Benjamin Herrenschmidt
litedram: Add support for booting without BRAM
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2020-06-05
Benjamin Herrenschmidt
litedram: Add simulation support
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2020-06-04
Paul Mackerras
Merge pull request #185 from ozbenh/misc
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2020-06-04
Michael Neuling
Merge pull request #188 from ozbenh/openocd-tweaks
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2020-06-04
Benjamin Herrenschmidt
flash-arty: Add support for specifying the file type
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2020-06-04
Benjamin Herrenschmidt
flash-arty: Support hex values for address
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2020-06-03
Paul Mackerras
Merge pull request #168 from shenki/flash-arty
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2020-06-02
Benjamin Herrenschmidt
dcache: Rework RAM wrapper to synthetize better on...
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2020-06-02
Benjamin Herrenschmidt
bin2hex: Make sure to generate little endian files
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2020-06-02
Benjamin Herrenschmidt
mw_debug: Fix memory overflow with "sim" backend
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2020-06-02
Anton Blanchard
Merge pull request #178 from antonblanchard/intercon
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2020-06-02
Anton Blanchard
Merge pull request #184 from antonblanchard/verific
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