yosys.git
2020-06-04 whitequarktechmap, flatten: remove dead options.
2020-06-03 whitequarkflatten: split from techmap.
2020-06-03 whitequarkMerge pull request #2104 from whitequark/simplify-techmap
2020-06-03 whitequarktechmap: remove dead variable. NFC.
2020-06-02 whitequarktechmap: use C++11 default member initializers. NFC.
2020-06-02 whitequarktechmap: simplify.
2020-06-02 whitequarktechmap: use +/techmap.v instead of an ad-hoc code...
2020-06-02 clairexenMerge pull request #2102 from YosysHQ/tests_fix
2020-06-02 clairexenMerge pull request #2101 from YosysHQ/mmicko/verific_as...
2020-06-01 Miodrag Milanovicallow range for mux test
2020-06-01 Miodrag MilanovicSupport asymmetric memories for verific frontend
2020-05-31 clairexenMerge pull request #1862 from boqwxp/cleanup_techmap
2020-05-30 Eddie HungMerge pull request #2081 from YosysHQ/eddie/blackbox_ast
2020-05-30 clairexenMerge pull request #2018 from boqwxp/qbfsat-timeout
2020-05-29 Alberto Gonzalezsmtbmc: Remove superfluous `yosys-smt2-timeout` file...
2020-05-29 clairexenMerge pull request #2029 from whitequark/fix-simplify...
2020-05-29 clairexenMerge pull request #1885 from Xiretza/mod-rem-cells
2020-05-29 clairexenMerge pull request #2092 from whitequark/rtlil-no-space...
2020-05-29 clairexenMerge pull request #2017 from boqwxp/qbfsat-cvc4
2020-05-29 clairexenMerge pull request #2016 from boqwxp/qbfsat-yices
2020-05-29 whitequarkMerge pull request #2097 from whitequark/ilang_lexer...
2020-05-29 whitequarkilang_lexer: fix check for out of range literal.
2020-05-29 whitequarkMerge pull request #2033 from boqwxp/cleanup-verilog...
2020-05-29 whitequarkRestrict RTLIL::IdString to not contain whitespace...
2020-05-28 XiretzaDocument division and modulo cells
2020-05-28 XiretzaUpdate CHANGELOG
2020-05-28 XiretzaAdd comments for mod/div semantics to rtlil.h
2020-05-28 XiretzaExpand tests/simple/constmuldivmod.v
2020-05-28 XiretzaAdd flooring division operator
2020-05-28 XiretzaAdd flooring modulo operator
2020-05-28 whitequarkMerge pull request #2095 from rswarbrick/hier-typo
2020-05-28 Rupert SwarbrickFix small typos in documentation for hierarchy command
2020-05-28 whitequarkMerge pull request #2091 from boqwxp/printattrs
2020-05-28 whitequarkMerge pull request #2051 from Xiretza/makefile-cd-warning
2020-05-28 whitequarkMerge pull request #2031 from epfl-vlsc/master
2020-05-28 whitequarkMerge pull request #2063 from boqwxp/techmapped-firrtl
2020-05-28 whitequarkMerge pull request #2088 from rswarbrick/count-at
2020-05-28 whitequarkMerge pull request #2087 from rswarbrick/lex-warn
2020-05-28 whitequarkMerge pull request #2086 from rswarbrick/sigbit
2020-05-28 whitequarkMerge pull request #2084 from rswarbrick/c_str
2020-05-28 Alberto Gonzalezprintattrs: Simplify `get_indent_str()`.
2020-05-27 Alberto Gonzalezprintattrs: Refactor indentation string building for...
2020-05-27 Alberto Gonzalezprintattrs: Add test.
2020-05-27 Alberto Gonzalezprintattrs: Use `flags` to pretty-print the `RTLIL...
2020-05-27 Alberto Gonzalezmisc: Add `printattrs` command.
2020-05-26 whitequarkMerge pull request #2090 from whitequark/cxxrtl-fixes
2020-05-26 whitequarkcxxrtl: make logging a little bit nicer.
2020-05-26 whitequarkcxxrtl: add missing parts of commit 281c9685.
2020-05-26 Rupert SwarbrickSilence spurious warning in Verilog lexer when compilin...
2020-05-26 Rupert SwarbrickMinor optimisation in Module::wire() and Module::cell()
2020-05-26 Rupert SwarbrickUse default copy constructor for RTLIL::SigBit
2020-05-26 Rupert SwarbrickUse c_str(), not str() for IdString/std::string ==...
2020-05-25 Eddie HungMerge pull request #2078 from YosysHQ/eddie/xilinx_sim_tidy
2020-05-25 Alberto Gonzalezsmtbmc and qbfsat: Add timeout option to set solver...
2020-05-25 Alberto Gonzalezqbfsat: Add support for CVC4.
2020-05-25 Alberto Gonzalezqbfsat: Move SMT2 info statements back to the top of...
2020-05-25 Alberto Gonzalezqbfsat: Add `-solver` option and allow choice of Z3...
2020-05-25 Eddie Hungblackbox: re-use existing Module::makeblackbox() method
2020-05-25 Eddie Hungtests: xilinx macc test to have initval, shorten BMC...
2020-05-25 Eddie Hungxilinx: tidy up cells_sim.v a little
2020-05-25 Eddie HungMerge pull request #2044 from YosysHQ/eddie/fix2037
2020-05-25 Eddie Hungverilog: move attr from simple_behav_stmt to its childr...
2020-05-25 Eddie Hungtest: add attribute-before-stmt test from @nakengelhardt
2020-05-25 Eddie Hungverilog: do not warn for attributes on null statements
2020-05-25 Eddie Hungtests: add an generate-else test too
2020-05-25 Eddie Hungverilog: handle empty generate statement by removing...
2020-05-25 Eddie Hungverilog: fix #2037 by permitting (and freeing) attribut...
2020-05-25 Eddie Hungtests: add #2037 testcase
2020-05-25 clairexenMerge pull request #2015 from boqwxp/qbfsat-bisection
2020-05-24 Eddie HungMerge pull request #2075 from YosysHQ/eddie/xaiger_cleanup
2020-05-24 Eddie Hungxaiger: add testcase
2020-05-24 Eddie Hungxaiger: do not derive cells
2020-05-23 Eddie HungMerge pull request #2074 from YosysHQ/eddie/ecp5_cleanup
2020-05-23 Eddie Hungecp5: cleanup unused +/ecp5/abc9_model.v
2020-05-23 Alberto Gonzalezqbfsat: Remove cruft inadvertently left untouched in...
2020-05-23 Alberto Gonzalezqbfsat: Add bisection mode and make it the default.
2020-05-22 whitequarkMerge pull request #2072 from whitequark/cxxrtl-dont...
2020-05-22 whitequarkcxxrtl: get rid of -O5 aka `opt_clean -purge` optimizat...
2020-05-22 Eddie Hungabc9_ops: update comment
2020-05-21 Eddie HungMerge pull request #2057 from YosysHQ/eddie/fix_task_attr
2020-05-21 Eddie HungUpdate frontends/verilog/verilog_parser.y
2020-05-21 Miodrag MilanovićMerge pull request #2059 from boqwxp/logger-vector...
2020-05-20 N. EngelhardtMerge pull request #2046 from PeterCrozier/trap
2020-05-20 N. EngelhardtMerge pull request #2054 from boqwxp/fix-smtbmc
2020-05-19 Alberto Gonzalezkernel: Try an order-independent approach to hashing...
2020-05-19 Alberto Gonzalezsmtbmc: Fix typo in error message.
2020-05-18 Marcelina KościelnickaAdd force_downto and force_upto wire attributes.
2020-05-18 Eddie HungMerge pull request #1926 from YosysHQ/eddie/abc9_auto_dff
2020-05-17 Alberto Gonzalezfirrtl: Accept techmapped cell types in FIRRTL backend.
2020-05-17 Claire WolfRevert "Add support for non-power-of-two mem chunks...
2020-05-15 Alberto Gonzalezlog: Use `dict` instead of `std::vector<std::pair>...
2020-05-14 Eddie Hungabc9: use (* abc9_keep *) instead of (* abc9_scc *...
2020-05-14 Eddie Hungverilog: attributes before task enable (but 13 s/r...
2020-05-14 Eddie Hungtests: attributes before task enable
2020-05-14 Eddie HungMerge pull request #2055 from YosysHQ/eddie/logger_multiple
2020-05-14 Alberto Gonzalezkernel: Ensure `dict` always hashes to the same value...
2020-05-14 Alberto Gonzalezkernel: Re-implement `dict` hash code as a `dict` membe...
2020-05-14 Alberto Gonzaleztechmap: Replace naughty `const_cast<>()`s.
2020-05-14 Alberto Gonzaleztechmap: Replace pseudo-private member usage with the...
2020-05-14 Eddie Hungtechmap: sort celltypeMap as it determines techmap...
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