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yosys.git
2019-07-15
Eddie Hung
Revert "Fix first divergence in #1178"
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2019-07-15
Eddie Hung
Merge branch 'master' into eddie/fix1178
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2019-07-15
Clifford Wolf
Redesign log_id_cache so that it doesn't keep IdString...
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2019-07-15
Clifford Wolf
Add log_checkpoint function and use it in opt_muxtree
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2019-07-14
Eddie Hung
Merge pull request #1194 from cr1901/miss-semi
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2019-07-14
William D....
Fix missing semicolon in Windows-specific code in aiger...
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2019-07-12
Clifford Wolf
Merge pull request #1183 from whitequark/ice40-always...
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2019-07-11
whitequark
synth_ice40: switch -relut to be always on.
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2019-07-11
whitequark
synth_ice40: fix help text typo. NFC.
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2019-07-11
Eddie Hung
Merge pull request #1182 from koriakin/xc6s-bram
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2019-07-11
Eddie Hung
Merge pull request #1185 from koriakin/xc-ff-init-vals
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2019-07-11
Marcin Kościelnicki
xilinx: Fix the default values for FDPE/FDSE INIT attri...
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2019-07-11
Eddie Hung
Enable &mfs for abc9, even if it only currently works...
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2019-07-11
Marcin Kościelnicki
synth_xilinx: Initial Spartan 6 block RAM inference...
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2019-07-11
Clifford Wolf
Merge pull request #1172 from whitequark/write_verilog...
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2019-07-11
Clifford Wolf
Merge pull request #1179 from whitequark/attrmap-proc
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2019-07-10
Eddie Hung
Merge pull request #1180 from YosysHQ/eddie/no_abc9_retime
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2019-07-10
Eddie Hung
Merge pull request #1148 from YosysHQ/xc7mux
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2019-07-10
Eddie Hung
Error out if -abc9 and -retime specified
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2019-07-10
Eddie Hung
Add some spacing
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2019-07-10
Eddie Hung
Add some ASCII art explaining mux decomposition
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2019-07-10
whitequark
attrmap: also consider process, switch and case attributes.
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2019-07-10
Clifford Wolf
Merge pull request #1177 from YosysHQ/clifford/async
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2019-07-10
Eddie Hung
Call muxpack and pmux2shiftx before cmp2lut
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2019-07-09
Eddie Hung
Fix first divergence in #1178
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2019-07-09
Eddie Hung
Restore opt_clean back to original place
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2019-07-09
Eddie Hung
Restore missing techmap -map +/cmp2lut.v with LUT_WIDTH=6
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2019-07-09
David Shah
synth_ecp5: Fix typo in copyright header
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2019-07-09
Clifford Wolf
Merge pull request #1174 from YosysHQ/eddie/fix1173
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2019-07-09
Clifford Wolf
Merge pull request #1175 from whitequark/write_verilog...
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2019-07-09
Clifford Wolf
Fix tests/various/async FFL test
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2019-07-09
Clifford Wolf
Improve tests/various/async, disable failing ffl test
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2019-07-09
Eddie Hung
Extend using A[1] to preserve don't care
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2019-07-09
Eddie Hung
Merge pull request #1171 from YosysHQ/revert-1166-eddie...
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2019-07-09
Eddie Hung
Merge remote-tracking branch 'origin/eddie/fix1173...
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2019-07-09
whitequark
write_verilog: fix placement of case attributes. NFC.
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2019-07-09
Eddie Hung
Increment _TECHMAP_BITS_CONNMAP_ by one since counting...
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2019-07-09
Clifford Wolf
Add tests/various/async.{sh,v}
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2019-07-09
Clifford Wolf
Improve tests/various/run-test.sh
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2019-07-09
Clifford Wolf
Add tests/simple_abc9/.gitignore
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2019-07-09
whitequark
write_verilog: write RTLIL::Sa aka - as Verilog ?.
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2019-07-09
Eddie Hung
Extend during mux decomposition with 1'bx
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2019-07-09
Eddie Hung
Fix typo and comments
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2019-07-09
Eddie Hung
Merge pull request #1170 from YosysHQ/eddie/fix_double_...
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2019-07-09
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7mux
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2019-07-09
Eddie Hung
synth_xilinx to call commands of synth -coarse directly
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2019-07-09
Eddie Hung
Revert "synth_xilinx to call "synth -run coarse" with...
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2019-07-09
Eddie Hung
Revert "Add "synth -keepdc" option"
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2019-07-09
Eddie Hung
Rename __builtin_bswap32 -> bswap32
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2019-07-09
Eddie Hung
Fix spacing
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2019-07-09
Eddie Hung
Fix spacing
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2019-07-09
Clifford Wolf
Merge pull request #1168 from whitequark/bugpoint-processes
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2019-07-09
Clifford Wolf
Merge pull request #1169 from whitequark/more-proc...
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2019-07-09
Clifford Wolf
Merge pull request #1163 from whitequark/more-case...
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2019-07-09
Clifford Wolf
Merge pull request #1162 from whitequark/rtlil-case...
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2019-07-09
Clifford Wolf
Merge pull request #1167 from YosysHQ/eddie/xc7srl_cleanup
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2019-07-09
whitequark
proc_prune: promote assigns to module connections when...
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2019-07-09
whitequark
proc_prune: new pass.
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2019-07-09
whitequark
bugpoint: add -assigns and -updates options.
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2019-07-09
whitequark
proc_clean: add -quiet option.
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2019-07-09
Eddie Hung
Decompose mux inputs in delay-orientated (rather than...
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2019-07-09
Eddie Hung
Do not call opt -mux_undef (part of -full) before muxcover
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2019-07-09
Eddie Hung
Add one more comment
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2019-07-09
Eddie Hung
Less thinking
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2019-07-09
Eddie Hung
Reword
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2019-07-09
Eddie Hung
Merge pull request #1166 from YosysHQ/eddie/synth_keepdc
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2019-07-09
Eddie Hung
Merge branch 'master' of github.com:YosysHQ/yosys
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2019-07-09
Eddie Hung
synth_xilinx to call "synth -run coarse" with "-keepdc"
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2019-07-09
Eddie Hung
Merge remote-tracking branch 'origin/eddie/synth_keepdc...
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2019-07-09
Eddie Hung
Clarify script -scriptwire doc
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2019-07-09
Eddie Hung
Add synth -keepdc to CHANGELOG
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2019-07-09
Eddie Hung
Clarify 'wreduce -keepdc' doc
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2019-07-09
Eddie Hung
Add synth -keepdc option
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2019-07-09
Eddie Hung
Map $__XILINX_SHIFTX in a more balanced manner
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2019-07-09
Eddie Hung
Capitalisation
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2019-07-09
Eddie Hung
Add synth_xilinx -widemux recommended value
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2019-07-08
Eddie Hung
Merge pull request #1164 from YosysHQ/eddie/muxcover_mux2
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2019-07-08
David Shah
Merge pull request #1160 from ZirconiumX/cyclone_v
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2019-07-08
Eddie Hung
Update muxcover doc as per @ZirconiumX
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2019-07-08
Eddie Hung
Fixes for 2:1 muxes
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2019-07-08
Eddie Hung
synth_xilinx -widemux=2 is minimum now
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2019-07-08
Eddie Hung
Parametric muxcover costs as per @daveshah1
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2019-07-08
Eddie Hung
Merge remote-tracking branch 'origin/eddie/muxcover_mux...
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2019-07-08
Eddie Hung
atoi -> stoi
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2019-07-08
Eddie Hung
Add muxcover -mux2=cost option
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2019-07-08
Eddie Hung
atoi -> stoi as per @daveshah1
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2019-07-08
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7mux
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2019-07-08
whitequark
verilog_backend: dump attributes on SwitchRule.
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2019-07-08
whitequark
proc_mux: consider \src attribute on CaseRule.
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2019-07-08
whitequark
verilog_backend: dump attributes on CaseRule, as comments.
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2019-07-08
whitequark
genrtlil: emit \src attribute on CaseRule.
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2019-07-08
whitequark
Allow attributes on individual switch cases in RTLIL.
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2019-07-07
Dan Ravensloft
synth_intel: Warn about untested Quartus backend
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2019-07-05
Clifford Wolf
Merge pull request #1159 from btut/fix/1090_segfault_ce...
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2019-07-04
Benedikt Tutzer
Throw runtime exception when trying to convert a c...
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2019-07-03
Eddie Hung
Merge pull request #1156 from YosysHQ/eddie/fix_abc9_un...
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2019-07-03
Clifford Wolf
Merge pull request #1147 from YosysHQ/clifford/fix1144
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2019-07-03
Clifford Wolf
Fix tests/various/specify.v
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2019-07-03
Clifford Wolf
Some cleanups in "ignore specify parser"
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2019-07-03
Clifford Wolf
Merge pull request #1154 from whitequark/manual-sync...
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