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gem5.git
2009-04-06 Stephen Hinesarm: add ARM support to M5 commit | commitdiff | tree
2008-02-29 Ali SaidiAdded tag m5_2.0_beta4 for changeset cad8c2b5d2ec commit | commitdiff | tree
2008-02-29 Ali SaidiAdded tag m5_2.0_beta5 for changeset fb826c79a385 commit | commitdiff | tree
2008-02-29 Lisa HsuError out if -s is used without --caches (instead of... m5_2.0_beta5 commit | commitdiff | tree
2008-02-29 Ali SaidiConfigs: Make sure options don't conflict commit | commitdiff | tree
2008-02-29 Ali SaidiConfigs: Fix some bugs we introduced in the simpoints... commit | commitdiff | tree
2008-02-27 Steve ReinhardtAutomated merge with ssh://daystrom.m5sim.org//repo/m5 commit | commitdiff | tree
2008-02-27 Steve ReinhardtUpdate outputs for quick tests to reflect fixed cache... commit | commitdiff | tree
2008-02-27 Korey SewellAdd comments in code to describe bug conditions. commit | commitdiff | tree
2008-02-27 Korey SewellFix Load/Store Queue squashing after a SMT thread is... commit | commitdiff | tree
2008-02-27 Korey SewellFix offset in removeThread() function so that float... commit | commitdiff | tree
2008-02-27 Steve ReinhardtRevamp cache timing access mshr check to make stats... commit | commitdiff | tree
2008-02-27 Rick StrongConfigs: Make using Simpoints easier with some config... commit | commitdiff | tree
2008-02-27 Gabe BlackX86: Put in initial implementation of the local APIC. commit | commitdiff | tree
2008-02-27 Gabe BlackX86: Implement the INVLPG instruction and the TIA microop. commit | commitdiff | tree
2008-02-27 Gabe BlackTLB: Make a TLB base class and put a virtual demapPage... commit | commitdiff | tree
2008-02-27 Gabe BlackX86: Get PCI config space to work, and adjust address... commit | commitdiff | tree
2008-02-27 Steve ReinhardtCache: better comments particularly regarding writeback... commit | commitdiff | tree
2008-02-26 Ali SaidiUpdate make release, README, and RELEASE_NOTES for b5 commit | commitdiff | tree
2008-02-26 Gabe BlackBus: Update the stats for the recent bus fix. commit | commitdiff | tree
2008-02-26 Gabe BlackBus: Fix the bus timing to be more realistic. commit | commitdiff | tree
2008-02-22 Vilas Sridharanadd instruction count fast forwaing and max instruction... commit | commitdiff | tree
2008-02-19 Stephen HinesAdded ARM_SE as a build option. commit | commitdiff | tree
2008-02-16 Steve ReinhardtUpdate stats for new writeback behavior. commit | commitdiff | tree
2008-02-16 Steve ReinhardtMake L2+ caches allocate new block for writeback misses commit | commitdiff | tree
2008-02-16 Steve ReinhardtUpdate stats for some unknown minor x86 changes commit | commitdiff | tree
2008-02-14 Ali SaidiCPU: move the PC Events code to a place where the code... commit | commitdiff | tree
2008-02-14 Ali SaidiConfigs: Change Simulation.py to return a subclass... commit | commitdiff | tree
2008-02-11 Ali SaidiUpdate copyright dates commit | commitdiff | tree
2008-02-11 Steve ReinhardtAutomated merge with file:/home/stever/hg/m5-orig commit | commitdiff | tree
2008-02-11 Steve ReinhardtEXTRAS now points to src instead of needing 'src' subdir. commit | commitdiff | tree
2008-02-11 Steve ReinhardtWait to set BUILD_DIR until *after* env is copied. commit | commitdiff | tree
2008-02-11 Nicolas ZeaBus: Only update port cache when there is an item to... commit | commitdiff | tree
2008-02-11 Ali SaidiIGbE: Fix a couple of bugs. commit | commitdiff | tree
2008-02-10 Steve ReinhardtFix #include lines for renamed cache files. commit | commitdiff | tree
2008-02-10 Steve ReinhardtRename cache files for brevity and consistency with... commit | commitdiff | tree
2008-02-06 Stephen HinesMake the Event::description() a const function commit | commitdiff | tree
2008-02-06 Stephen HinesAdd base ARM code to M5 commit | commitdiff | tree
2008-02-06 Steve ReinhardtCleaned up os.path imports a bit. commit | commitdiff | tree
2008-02-06 Steve ReinhardtMake EXTRAS work for SConsopts too. commit | commitdiff | tree
2008-01-23 Gabe BlackX86: Put an SMBios/DMI table in memory. commit | commitdiff | tree
2008-01-23 Gabe BlackX86: Optomize the bit scanning instruction microassembl... commit | commitdiff | tree
2008-01-22 Gabe BlackX86: Implement and attach the BSR and BSF instructions. commit | commitdiff | tree
2008-01-21 Gabe BlackX86: Fill out group17 in the decoder. commit | commitdiff | tree
2008-01-21 Gabe BlackX86: Use the existing boot_osflags instead of duplicati... commit | commitdiff | tree
2008-01-16 Ali SaidiUpdate long o3 regressions for o3 change in previous... commit | commitdiff | tree
2008-01-15 Steve ReinhardtUpdate O3 ref outputs: very minor stats change due... commit | commitdiff | tree
2008-01-14 Ke MengThe reason is that the event is supposed to put the... commit | commitdiff | tree
2008-01-12 Gabe BlackX86: Redo the bit test instructions. commit | commitdiff | tree
2008-01-12 Gabe BlackX86: Fix the wrmsr instruction. commit | commitdiff | tree
2008-01-12 Gabe BlackX86: Make the effective segment base shadow the regular... commit | commitdiff | tree
2008-01-12 Gabe BlackX86: Make the IO ports work using extra physical addres... commit | commitdiff | tree
2008-01-12 Gabe BlackX86: Fix the general IO instructions dataSize. commit | commitdiff | tree
2008-01-06 Geoffrey BlakeTemporary fix for ll/sc bug see flyspray task for more... commit | commitdiff | tree
2008-01-02 Steve ReinhardtVery minor memtest regression stats changes from recent... commit | commitdiff | tree
2008-01-02 Steve ReinhardtAdd ReadRespWithInvalidate to handle multi-level cohere... commit | commitdiff | tree
2008-01-02 Steve ReinhardtMark cache-to-cache MSHRs as downstreamPending when... commit | commitdiff | tree
2008-01-02 Steve ReinhardtDon't DPRINTF in the middle of a PrintReq. commit | commitdiff | tree
2008-01-02 Steve ReinhardtBug fix: functional cache port now needs otherPort... commit | commitdiff | tree
2008-01-02 Steve ReinhardtAdditional comments and helper functions for PrintReq. commit | commitdiff | tree
2008-01-02 Steve ReinhardtAdd functional PrintReq command for memory-system debug... commit | commitdiff | tree
2008-01-02 Steve ReinhardtFix formatting and comments in cache_impl.hh commit | commitdiff | tree
2008-01-01 Gabe BlackSPARC: Fix a bug where the TLB would match against... commit | commitdiff | tree
2007-12-18 Ali SaidiCheckpointing: Fix a bug in the simulation script when... commit | commitdiff | tree
2007-12-16 Ali SaidiCPU: Update where the simple cpus read their cpu id... commit | commitdiff | tree
2007-12-11 Steve ReinhardtFix minor bug in util/style.py commit | commitdiff | tree
2007-12-03 Gabe BlackX86: Update the parser reference output which has myste... commit | commitdiff | tree
2007-12-03 Gabe BlackX86: Please excuse my dear Aunt Sally. (precedence... commit | commitdiff | tree
2007-12-02 Gabe BlackX86: Make sure the memory index is calculated using... commit | commitdiff | tree
2007-12-02 Gabe BlackX86: Fix a copy/paste mistake where the bit test instru... commit | commitdiff | tree
2007-12-02 Gabe BlackX86: Make the page not present panic more descriptive. commit | commitdiff | tree
2007-12-02 Gabe BlackX86: Start setting up the real mode data structure. commit | commitdiff | tree
2007-12-02 Gabe BlackX86: Make the 0xA0-0xA3 versions of mov use the right... commit | commitdiff | tree
2007-12-02 Gabe BlackX86: Add in a missing "break". commit | commitdiff | tree
2007-12-02 Gabe BlackX86: Actually do something for the MiscRegFile clear... commit | commitdiff | tree
2007-12-02 Gabe BlackX86: Move startup code to the system object to initiali... commit | commitdiff | tree
2007-12-02 Gabe BlackX86: Add a missing microcode file to the sconscript. commit | commitdiff | tree
2007-12-02 Gabe BlackX86: Fix a copy paste error in the bts microcode. commit | commitdiff | tree
2007-12-02 Gabe BlackX86: Implement mov from control register. commit | commitdiff | tree
2007-12-02 Gabe BlackX86: First crack at far returns. This is grossly approx... commit | commitdiff | tree
2007-12-02 Gabe BlackX86: Reorganize segmentation and implement segment... commit | commitdiff | tree
2007-12-02 Gabe BlackX86: Make the "fault" microop predicated. commit | commitdiff | tree
2007-12-02 Gabe BlackX86: Implement the LIDT instruction. commit | commitdiff | tree
2007-12-02 Gabe BlackX86: Implement the lgdt instruction. commit | commitdiff | tree
2007-12-02 Gabe BlackX86: Implement wrbase and wrlimit for loading pseudo... commit | commitdiff | tree
2007-12-02 Gabe BlackX86: Separate the effective seg base and the "hidden... commit | commitdiff | tree
2007-12-01 Gabe BlackSPARC: Fixes for invalidateAll and demapAll in the... commit | commitdiff | tree
2007-11-30 Gabe BlackSPARC: Fix 32 bit register window flushing endian conve... commit | commitdiff | tree
2007-11-29 Gabe BlackSPARC: Fix the initial stack to match what the Linux... commit | commitdiff | tree
2007-11-29 Gabe BlackSPARC: Combine the 64 and 32 bit process initialization... commit | commitdiff | tree
2007-11-29 Ali Saidimerge, no manual changes commit | commitdiff | tree
2007-11-29 Rick StrongSerialization: Fix serialization of file descriptors... commit | commitdiff | tree
2007-11-28 Gabe BlackMake ports that aren't connected to anything fail more... commit | commitdiff | tree
2007-11-21 Gabe Blackimported patch pagewalker.patch commit | commitdiff | tree
2007-11-21 Gabe BlackGet rid of a file that should have never been committed. commit | commitdiff | tree
2007-11-20 Gabe BlackMerge with head. commit | commitdiff | tree
2007-11-20 Gabe BlackSimple CPU fix simple mistake in translateDataWriteAddr. commit | commitdiff | tree
2007-11-20 Steve ReinhardtMight as well ship splash2 scripts since we get questio... commit | commitdiff | tree
2007-11-20 Ali SaidiSerialization: Serialize SPARC PTEs last so their nameO... commit | commitdiff | tree
2007-11-19 Ali SaidiMemory: Cache the physical memory start and size so... commit | commitdiff | tree
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