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yosys.git
2015-04-03 Ahmed Irfanappnote for verilog to btor commit | commitdiff | tree
2014-09-22 Ahmed IrfanMerge branch 'master' of https://github.com/cliffordwol... commit | commitdiff | tree
2014-09-21 Clifford WolfRe-enabled assert for new logic loops in "share" pass commit | commitdiff | tree
2014-09-21 Clifford WolfVarious improvements regarding logic loops in "share... commit | commitdiff | tree
2014-09-21 Clifford WolfLogic loop bugfix for "share" pass commit | commitdiff | tree
2014-09-21 Clifford WolfAdded "share -limit" commit | commitdiff | tree
2014-09-21 Clifford WolfStill loop bug in "share": changed assert to warning commit | commitdiff | tree
2014-09-21 Clifford WolfDo not introduce new logic loops in "share" commit | commitdiff | tree
2014-09-21 Clifford WolfAssert on new logic loops in "share" pass commit | commitdiff | tree
2014-09-19 Clifford WolfAdded "test_abcloop" command commit | commitdiff | tree
2014-09-19 Clifford WolfInitialize RTLIL::Const from std::vector<bool> commit | commitdiff | tree
2014-09-19 Clifford WolfSorting of object names in ilang backend commit | commitdiff | tree
2014-09-19 Clifford WolfSmall improvements in "abc" command handle_loops()... commit | commitdiff | tree
2014-09-19 Clifford WolfUsing "NOT" instead of "INV" as cell name in default... commit | commitdiff | tree
2014-09-19 Clifford WolfAlphabetically sort port names in "show" output commit | commitdiff | tree
2014-09-18 Clifford WolfDo not run "scorr" in "abc -fast" commit | commitdiff | tree
2014-09-18 Clifford WolfImprovements in "synth" script commit | commitdiff | tree
2014-09-18 Clifford WolfAdded "abc -fast" commit | commitdiff | tree
2014-09-18 ahmedirfan1983fixed memory next issue, when same memory is written... commit | commitdiff | tree
2014-09-17 Clifford WolfAdded commit count to devel version number commit | commitdiff | tree
2014-09-16 Clifford WolfFixed $_NOR vs. $_NOR_ typo in abc.cc commit | commitdiff | tree
2014-09-16 Clifford WolfFixed $memwr/$memrd order in memory_dff commit | commitdiff | tree
2014-09-16 Clifford WolfAdded new CodingReadme file (replaces CodingStyle and... commit | commitdiff | tree
2014-09-16 Clifford WolfFixed $macc simlib model for zero-config commit | commitdiff | tree
2014-09-15 Clifford WolfMore aggressive $macc merging in alumacc commit | commitdiff | tree
2014-09-15 Clifford WolfAdded the obvious optimizations to alumacc $macc generator commit | commitdiff | tree
2014-09-15 Clifford WolfImproved maccmap tree bit packing commit | commitdiff | tree
2014-09-15 Clifford WolfFixed wreduce $shiftx handling commit | commitdiff | tree
2014-09-14 Clifford WolfFixed monitor notifications for removed cell commit | commitdiff | tree
2014-09-14 Clifford WolfAdded "synth" command commit | commitdiff | tree
2014-09-14 Clifford WolfFixed techmap_wrap for techmap_celltype commit | commitdiff | tree
2014-09-14 Clifford WolfUsing alumacc in techmap.v commit | commitdiff | tree
2014-09-14 Clifford WolfVarious fixes/cleanups in alumacc and maccmap commit | commitdiff | tree
2014-09-14 Clifford WolfAdded techmap_wrap attribute commit | commitdiff | tree
2014-09-14 Clifford Wolfalumacc fix for $pos cells commit | commitdiff | tree
2014-09-14 Clifford WolfExtract $alu cells in alumacc commit | commitdiff | tree
2014-09-14 Clifford WolfMerge $macc cells in alumacc pass commit | commitdiff | tree
2014-09-14 Clifford WolfBasic $macc extract in alumacc commit | commitdiff | tree
2014-09-14 Clifford Wolfalumacc skeleton commit | commitdiff | tree
2014-09-14 Clifford WolfCleanup in wreduce commit | commitdiff | tree
2014-09-13 Clifford WolfUsing pkg-config to find libffi commit | commitdiff | tree
2014-09-08 Clifford WolfFixed simlib $macc model for xilinx xsim commit | commitdiff | tree
2014-09-08 Clifford WolfSimplified $fa undef model commit | commitdiff | tree
2014-09-08 Clifford WolfFixes and cleanups for blackbox.v commit | commitdiff | tree
2014-09-08 Clifford WolfAdded $lcu cell type commit | commitdiff | tree
2014-09-08 Clifford WolfAnother $clog2 bugfix commit | commitdiff | tree
2014-09-08 Clifford WolfAdded "$fa" cell type commit | commitdiff | tree
2014-09-08 Clifford WolfTrim msb/lsb zero bits from full adder in maccmap commit | commitdiff | tree
2014-09-08 Clifford WolfAdded "test_cell -const" commit | commitdiff | tree
2014-09-07 Clifford WolfUsing maccmap for $macc and $mul techmap commit | commitdiff | tree
2014-09-07 Clifford WolfAdded 'techmap_maccmap' techmap attribute commit | commitdiff | tree
2014-09-07 Clifford WolfAdded "maccmap" command commit | commitdiff | tree
2014-09-07 Clifford WolfAdded "test_cell -nosat" commit | commitdiff | tree
2014-09-06 Clifford WolfVarious bug fixes (related to $macc model testing) commit | commitdiff | tree
2014-09-06 Clifford WolfAdded $macc eval model commit | commitdiff | tree
2014-09-06 Clifford WolfAdded $macc SAT model commit | commitdiff | tree
2014-09-06 Clifford WolfFixed $clog2 (off by one error) commit | commitdiff | tree
2014-09-06 Clifford WolfAdded $macc simlib model (also use as techmap rule... commit | commitdiff | tree
2014-09-06 Clifford WolfFixed assignment of out-of bounds array element commit | commitdiff | tree
2014-09-06 Clifford WolfAdded $macc cell type commit | commitdiff | tree
2014-09-06 Clifford WolfFixed autotest for non-basename arguments commit | commitdiff | tree
2014-09-06 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys commit | commitdiff | tree
2014-09-06 Clifford WolfAdded "test_cell -script" commit | commitdiff | tree
2014-09-06 Clifford WolfMerge pull request #38 from rubund/master commit | commitdiff | tree
2014-09-06 Ruben UndheimCorrected spelling mistakes found by lintian commit | commitdiff | tree
2014-09-04 Clifford WolfAdded tests/various/constmsk_test.ys commit | commitdiff | tree
2014-09-04 Clifford WolfFixed "opt_const -fine" for $pos cells commit | commitdiff | tree
2014-09-04 Clifford WolfRemoved $bu0 cell type commit | commitdiff | tree
2014-09-03 Clifford WolfUsing $pos models for $bu0 commit | commitdiff | tree
2014-09-03 Clifford WolfFixed "test_cells -vlog" commit | commitdiff | tree
2014-09-03 Clifford WolfFixes in $alu SAT- and eval-models commit | commitdiff | tree
2014-09-02 Clifford WolfUndef-related fixes in simlib $alu model commit | commitdiff | tree
2014-09-02 Clifford WolfImprovements in "test_cell -vlog" commit | commitdiff | tree
2014-09-02 Clifford WolfAdded test_cell -vlog commit | commitdiff | tree
2014-09-02 Clifford WolfCreate a default selection stack in RTLIL::Design:... commit | commitdiff | tree
2014-09-02 Clifford WolfSmall bug fixes in $not, $neg, and $shiftx models commit | commitdiff | tree
2014-09-02 Clifford WolfAdded SAT testing to test_cell eval stage commit | commitdiff | tree
2014-09-02 Ahmed Irfanadded $pmux cell translation commit | commitdiff | tree
2014-09-02 Clifford WolfRemoved references to yosys-svgviewer from docs commit | commitdiff | tree
2014-09-02 Clifford WolfRemoved yosys-svgviewer commit | commitdiff | tree
2014-09-02 Clifford WolfUsing "xdot" instead of "yosys-svgviewer" in show command commit | commitdiff | tree
2014-09-01 Clifford WolfAdded $alu support to test_cell commit | commitdiff | tree
2014-09-01 Clifford WolfAdded ConstEval model for $alu cells commit | commitdiff | tree
2014-09-01 Clifford WolfAdded SAT model for $alu cells commit | commitdiff | tree
2014-09-01 Clifford WolfFixed "test_cell -simlib all" commit | commitdiff | tree
2014-09-01 Clifford WolfAdded "test_cell -simlib -v" commit | commitdiff | tree
2014-09-01 Clifford WolfAdded "techmap -autoproc" commit | commitdiff | tree
2014-09-01 Clifford WolfFixes in old SAT example.ys commit | commitdiff | tree
2014-09-01 Clifford WolfMoved "share" and "wreduce" to passes/opt/ commit | commitdiff | tree
2014-09-01 Clifford WolfUsing std::vector<RTLIL::State> instead of RTLIL::Const... commit | commitdiff | tree
2014-08-31 Clifford WolfAdded eval testing to test_cell commit | commitdiff | tree
2014-08-31 Clifford WolfFixed return size of const_*() eval functions commit | commitdiff | tree
2014-08-31 Clifford WolfAdded RTLIL::Const::size() commit | commitdiff | tree
2014-08-31 Clifford WolfAdded eval model for $lut cells commit | commitdiff | tree
2014-08-31 Clifford WolfTypo fixes in cell->*Param() API commit | commitdiff | tree
2014-08-31 Clifford WolfAdded $lut support in test_cell, techmap, satgen commit | commitdiff | tree
2014-08-30 Clifford WolfAdded design->scratchpad commit | commitdiff | tree
2014-08-30 Clifford WolfAdded $alu cell type commit | commitdiff | tree
2014-08-30 Clifford WolfAdded autotest -e (do not use -noexpr on write_verilog) commit | commitdiff | tree
2014-08-30 Clifford WolfImproved write address decoder generation memory_map commit | commitdiff | tree
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