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yosys.git
2014-08-21 Clifford WolfAdded Verilog/AST support for DPI functions (dpi_call... commit | commitdiff | tree
2014-08-21 Clifford WolfAdded support for global tasks and functions commit | commitdiff | tree
2014-08-18 Clifford WolfUsing "via_celltype" in $mul carry-save-acc implementation commit | commitdiff | tree
2014-08-18 Clifford WolfAdded "via_celltype" attribute on task/func commit | commitdiff | tree
2014-08-17 Clifford WolfPerformance fix for new $__lcu techmap rule commit | commitdiff | tree
2014-08-17 Clifford WolfReplaced recursive lcu scheme with bk adder commit | commitdiff | tree
2014-08-17 Clifford WolfAdded const folding of AST_CASE to AST simplifier commit | commitdiff | tree
2014-08-17 Clifford WolfFixed proc_{self,share}_dirname error handling commit | commitdiff | tree
2014-08-17 Clifford WolfMakefile fixes commit | commitdiff | tree
2014-08-17 Clifford WolfImproved AST ProcessGenerator performance commit | commitdiff | tree
2014-08-17 Clifford WolfImproved sig.remove2() performance commit | commitdiff | tree
2014-08-16 Clifford WolfUse stackmap<> in AST ProcessGenerator commit | commitdiff | tree
2014-08-16 Clifford WolfAdded stackmap<> container commit | commitdiff | tree
2014-08-16 Clifford WolfRenamed toposort.h to utils.h commit | commitdiff | tree
2014-08-16 Clifford WolfAdded module->uniquify() commit | commitdiff | tree
2014-08-16 Clifford WolfFixed AOI/OAI expr handling in verilog backend commit | commitdiff | tree
2014-08-16 Clifford WolfMultiply using a carry-save accumulator commit | commitdiff | tree
2014-08-16 Clifford WolfAdded "test_cell -s <seed>" commit | commitdiff | tree
2014-08-16 Clifford WolfAST ProcessGenerator: replaced subst_*_{from,to} with... commit | commitdiff | tree
2014-08-16 Clifford WolfAdded additional gate types: $_NAND_ $_NOR_ $_XNOR_... commit | commitdiff | tree
2014-08-16 Clifford WolfAdded CellTypes::cell_evaluable() commit | commitdiff | tree
2014-08-16 Clifford WolfChanges in techmap $__alu interface commit | commitdiff | tree
2014-08-16 Clifford WolfAdded "opt -fast" commit | commitdiff | tree
2014-08-16 Clifford WolfAdded log_spacer() commit | commitdiff | tree
2014-08-15 Clifford WolfBugfix in iopadmap commit | commitdiff | tree
2014-08-15 Clifford WolfRenamed $lut ports to follow A-Y naming scheme commit | commitdiff | tree
2014-08-15 Clifford WolfRenamed $_INV_ cell type to $_NOT_ commit | commitdiff | tree
2014-08-15 Clifford WolfRemoved old doc references to $safe_pmux commit | commitdiff | tree
2014-08-15 Clifford WolfMore idstring sort_by_* helpers and fixed tpl ordering... commit | commitdiff | tree
2014-08-15 Clifford WolfAdded Frontend "+/" filename syntax for files from... commit | commitdiff | tree
2014-08-15 Clifford Wolfdocument "techmap -map %<design-name>" commit | commitdiff | tree
2014-08-14 Clifford WolfFixed bug in "read_verilog -ignore_redef" commit | commitdiff | tree
2014-08-14 Clifford WolfAdded RTLIL::SigSpec::to_sigbit_map() commit | commitdiff | tree
2014-08-14 Clifford WolfChanged the AST genWidthRTLIL subst interface to use... commit | commitdiff | tree
2014-08-14 Clifford WolfAdded sig.{replace,remove,extract} variants for std... commit | commitdiff | tree
2014-08-14 Clifford WolfFixed line numbers when using here-doc macros commit | commitdiff | tree
2014-08-14 Clifford WolfFixed handling of task outputs commit | commitdiff | tree
2014-08-14 Clifford WolfSimplified $__arraymul techmap rule commit | commitdiff | tree
2014-08-14 Clifford WolfAdded module->ports commit | commitdiff | tree
2014-08-14 Clifford WolfRefactoring of CellType class commit | commitdiff | tree
2014-08-14 Clifford WolfRIP $safe_pmux commit | commitdiff | tree
2014-08-14 Clifford WolfSome improvements in FSM mapping and recoding commit | commitdiff | tree
2014-08-14 Clifford WolfAdded "abc -D" for setting delay target commit | commitdiff | tree
2014-08-14 Clifford WolfUpdated ABC to 4935c2b946de commit | commitdiff | tree
2014-08-13 Clifford WolfAdded techmap support for actual lookahead carry unit commit | commitdiff | tree
2014-08-13 Clifford WolfPreparations for lookahead ALU support in techmap.v commit | commitdiff | tree
2014-08-13 Clifford WolfFilter ANSI escape sequences from ABC output commit | commitdiff | tree
2014-08-13 Clifford WolfNew interface for $__alu in techmap.v commit | commitdiff | tree
2014-08-13 Clifford WolfAdded support for non-standard """ macro bodies commit | commitdiff | tree
2014-08-12 Clifford WolfFixed handling of constant-true branches in proc_clean commit | commitdiff | tree
2014-08-12 Clifford WolfAdded test_verific mode to tests/fsm/generate.py commit | commitdiff | tree
2014-08-12 Clifford WolfFixed SigBit(RTLIL::Wire *wire) constructor commit | commitdiff | tree
2014-08-12 Clifford WolfFixed building verific bindings commit | commitdiff | tree
2014-08-12 Clifford WolfAdded multi-dim memory test (requires iverilog git... commit | commitdiff | tree
2014-08-11 Clifford WolfAnother build fix by americanrouter (via reddit) commit | commitdiff | tree
2014-08-10 Clifford WolfFixed FSM mapping for multiple reset-like signals commit | commitdiff | tree
2014-08-09 Clifford WolfFixed "share" for complex scenarios with never-active... commit | commitdiff | tree
2014-08-09 Clifford WolfDo not share any $reduce_* cells (its complicated and... commit | commitdiff | tree
2014-08-09 Clifford WolfSome improvements in fsm_opt and fsm_map for FSM with... commit | commitdiff | tree
2014-08-08 Clifford WolfImproved FSM tests commit | commitdiff | tree
2014-08-08 Clifford WolfAnother fsm_extract bugfix commit | commitdiff | tree
2014-08-08 Clifford WolfFixed "fsm -export" commit | commitdiff | tree
2014-08-08 Clifford WolfFixed sharing of reduce operator commit | commitdiff | tree
2014-08-08 Clifford WolfFixed fsm_extract for wreduced muxes commit | commitdiff | tree
2014-08-08 Clifford WolfAdded FSM test bench commit | commitdiff | tree
2014-08-08 Clifford WolfAdded "sat -prove-skip" commit | commitdiff | tree
2014-08-07 Clifford WolfFixed build with gcc-4.6 commit | commitdiff | tree
2014-08-07 Clifford WolfUse "-keepdc" in "miter -equiv -flatten" commit | commitdiff | tree
2014-08-07 Clifford WolfAlso allow "module foobar(input foo, output bar, .... commit | commitdiff | tree
2014-08-07 Clifford WolfAdded adff2dff.v (for techmap -share_map) commit | commitdiff | tree
2014-08-06 Clifford WolfAdded AST_MULTIRANGE (arrays with more than 1 dimension) commit | commitdiff | tree
2014-08-06 Clifford WolfVarious improvements in memory_dff pass commit | commitdiff | tree
2014-08-05 Clifford WolfVarious fixes and improvements in wreduce pass commit | commitdiff | tree
2014-08-05 Clifford WolfRemoved old "constmap" from wreduce code commit | commitdiff | tree
2014-08-05 Clifford WolfAdded support for truncating of wires to wreduce pass commit | commitdiff | tree
2014-08-05 Clifford WolfCleanups and improvements in wreduce pass commit | commitdiff | tree
2014-08-05 Clifford WolfAdded mux support to wreduce command commit | commitdiff | tree
2014-08-05 Clifford WolfImproved scope resolution of local regs in Verilog... commit | commitdiff | tree
2014-08-05 Clifford WolfFixed AST handling of variables declared inside a funct... commit | commitdiff | tree
2014-08-04 Clifford WolfAdded "show -signed" commit | commitdiff | tree
2014-08-04 Clifford WolfAdded support for non-standard "module mod_name(..... commit | commitdiff | tree
2014-08-04 Clifford WolfAdded RTLIL::IdString::in(...) commit | commitdiff | tree
2014-08-03 Clifford WolfFixed "share" for memory read ports commit | commitdiff | tree
2014-08-03 Clifford WolfAdded "wreduce" to some of the standard test benches commit | commitdiff | tree
2014-08-03 Clifford WolfProgress in "wreduce" pass commit | commitdiff | tree
2014-08-03 Clifford WolfAdded "wreduce" command (work in progress) commit | commitdiff | tree
2014-08-03 Clifford WolfAdded query() API to ModIndex commit | commitdiff | tree
2014-08-03 Clifford WolfAdded ID() macro for static IdStrings commit | commitdiff | tree
2014-08-03 Clifford WolfImplemented recursive techmap commit | commitdiff | tree
2014-08-03 Clifford WolfFixes in show command (related to new IdString) commit | commitdiff | tree
2014-08-02 Clifford WolfImplemented simplemap support for "techmap -extern" commit | commitdiff | tree
2014-08-02 Clifford WolfFixed a va_list corruption in logv_error() commit | commitdiff | tree
2014-08-02 Clifford WolfBe more conservative with printing decimal numbers... commit | commitdiff | tree
2014-08-02 Clifford WolfImproved verilog output for ordinary $mux cells commit | commitdiff | tree
2014-08-02 Clifford WolfBugfix in "techmap -extern" commit | commitdiff | tree
2014-08-02 Clifford WolfRemoved at() method from RTLIL::IdString commit | commitdiff | tree
2014-08-02 Clifford WolfNo implicit conversion from IdString to anything else commit | commitdiff | tree
2014-08-02 Clifford WolfMore bugfixes related to new RTLIL::IdString commit | commitdiff | tree
2014-08-02 Clifford WolfLimit size of log_signal buffer to 100 elements commit | commitdiff | tree
2014-08-02 Clifford WolfImprovements in new RTLIL::IdString implementation commit | commitdiff | tree
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