projects / yosys.git / shortlog
? search:
summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next
yosys.git
2020-02-13 Eddie Hungverilog: fix $specify3 check commit | commitdiff | tree
2020-02-13 Claire WolfMerge pull request #1694 from rqou/json_compat_fix commit | commitdiff | tree
2020-02-13 N. EngelhardtMerge pull request #1679 from thasti/delay-parsing commit | commitdiff | tree
2020-02-10 Eddie Hungabc9: cleanup commit | commitdiff | tree
2020-02-10 Eddie HungMerge pull request #1670 from rodrigomelo9/master commit | commitdiff | tree
2020-02-10 N. EngelhardtMerge pull request #1669 from thasti/pyosys-attrs commit | commitdiff | tree
2020-02-09 whitequarkMerge pull request #1695 from whitequark/manual-explain... commit | commitdiff | tree
2020-02-09 whitequarkmanual: explain RTLIL::Wire::{upto,offset}. commit | commitdiff | tree
2020-02-09 R. Oujson: Change compat mode to directly emit ints <= 32... commit | commitdiff | tree
2020-02-07 Eddie HungRemove unnecessary comma commit | commitdiff | tree
2020-02-07 Eddie HungMerge pull request #1687 from YosysHQ/eddie/fix_ystests commit | commitdiff | tree
2020-02-07 Eddie Hungtechmap: fix shiftx2mux decomposition commit | commitdiff | tree
2020-02-07 Eddie HungFix misc.abc9.abc9_abc9_luts commit | commitdiff | tree
2020-02-07 Marcin Kościelnickixilinx: Add support for LUT RAM on LUT4-based devices. commit | commitdiff | tree
2020-02-07 Marcin Kościelnickixilinx: Initial support for LUT4 devices. commit | commitdiff | tree
2020-02-07 Eddie HungMerge pull request #1685 from dh73/gowin commit | commitdiff | tree
2020-02-07 whitequarkMerge pull request #1683 from whitequark/write_verilog... commit | commitdiff | tree
2020-02-07 Marcin Kościelnickixilinx: Add block RAM mapping for Virtex 2* and Spartan 3*. commit | commitdiff | tree
2020-02-07 Marcin Kościelnickixilinx: Add support for Spartan 3A DSP block RAMs. commit | commitdiff | tree
2020-02-06 Eddie HungMerge pull request #1684 from YosysHQ/eddie/xilinx_arit... commit | commitdiff | tree
2020-02-06 Diego HRemoving cells_sim.v from bram techmap pass commit | commitdiff | tree
2020-02-06 Eddie HungFix $lcu -> MUXCY mapping, credit @mwkmwkmwk commit | commitdiff | tree
2020-02-06 Eddie HungFix/cleanup +/xilinx/arith_map.v commit | commitdiff | tree
2020-02-06 Marcin Kościelnickiedif: more resilience to mismatched port connection... commit | commitdiff | tree
2020-02-06 whitequarkwrite_verilog: dump $mem cell attributes. commit | commitdiff | tree
2020-02-06 Rodrigo Alejandro... Added 'set -e' into tests/memfile/run-test.sh commit | commitdiff | tree
2020-02-06 Rodrigo Alejandro... Modified $readmem[hb] to use '\' or '/' according the OS commit | commitdiff | tree
2020-02-06 Eddie HungMerge pull request #1682 from YosysHQ/eddie/opt_after_t... commit | commitdiff | tree
2020-02-06 Eddie Hungsynth_*: call 'opt -fast' after 'techmap' commit | commitdiff | tree
2020-02-06 Eddie Hungshiftx2mux: fix select out of bounds commit | commitdiff | tree
2020-02-05 Eddie HungMerge pull request #1576 from YosysHQ/eddie/opt_merge_init commit | commitdiff | tree
2020-02-05 Eddie HungMerge pull request #1650 from YosysHQ/eddie/shiftx2mux commit | commitdiff | tree
2020-02-05 Eddie Hungabc9_ops: -reintegrate to use derived_type for box_ports commit | commitdiff | tree
2020-02-05 Eddie HungMerge remote-tracking branch 'origin/master' into eddie... commit | commitdiff | tree
2020-02-05 Eddie HungMerge pull request #1638 from YosysHQ/eddie/fix1631 commit | commitdiff | tree
2020-02-05 Eddie HungMerge pull request #1661 from YosysHQ/eddie/abc9_required commit | commitdiff | tree
2020-02-03 Stefan Biereigeladd testcase for #1614 commit | commitdiff | tree
2020-02-03 Stefan Biereigelcorrect wire declaration grammar for #1614 commit | commitdiff | tree
2020-02-03 Stefan Biereigelremove namespace mention from inheritance information commit | commitdiff | tree
2020-02-03 Stefan Biereigelexpose polymorphism through python wrappers commit | commitdiff | tree
2020-02-03 Rodrigo A.... Merge branch 'master' into master commit | commitdiff | tree
2020-02-03 Marcelina KościelnickaAdd opt_lut_ins pass. (#1673) commit | commitdiff | tree
2020-02-03 Rodrigo Alejandro... Merge branch 'master' of https://github.com/YosysHQ... commit | commitdiff | tree
2020-02-03 Rodrigo Alejandro... Replaced strlen by GetSize into simplify.cc commit | commitdiff | tree
2020-02-02 David ShahMerge pull request #1516 from YosysHQ/dave/dotstar commit | commitdiff | tree
2020-02-02 David ShahUpdate CHANGELOG and README commit | commitdiff | tree
2020-02-02 David Shahsv: Improve handling of wildcard port connections commit | commitdiff | tree
2020-02-02 David Shahsv: More tests for wildcard port connections commit | commitdiff | tree
2020-02-02 David Shahhierarchy: Correct handling of wildcard port connection... commit | commitdiff | tree
2020-02-02 David Shahsv: Add tests for wildcard port connections commit | commitdiff | tree
2020-02-02 David Shahhierarchy: Resolve SV wildcard port connections commit | commitdiff | tree
2020-02-02 David Shahsv: Add lexing and parsing of .* (wildcard port conns) commit | commitdiff | tree
2020-02-02 Rodrigo Alejandro... Removed 'synth' into tests/memfile/run-test.sh commit | commitdiff | tree
2020-02-02 Rodrigo Alejandro... Added content1.dat into tests/memfile commit | commitdiff | tree
2020-02-02 David ShahMerge pull request #1647 from YosysHQ/dave/sprintf commit | commitdiff | tree
2020-02-02 David ShahMerge pull request #1657 from YosysHQ/dave/xilinx-dsp... commit | commitdiff | tree
2020-02-02 Marcin Kościelnickixilinx: use RAM32M/RAM64M for memories with two read... commit | commitdiff | tree
2020-02-02 Rodrigo Alejandro... Removed a line jump into the CHANGELOG commit | commitdiff | tree
2020-02-02 Rodrigo Alejandro... Added tests/memfile to 'make test' with an extra testcase commit | commitdiff | tree
2020-02-01 Rodrigo Alejandro... Added a test for the Memory Content File inclusion... commit | commitdiff | tree
2020-02-01 Rodrigo Alejandro... Fixed a bug in the new feature of $readmem[hb] when... commit | commitdiff | tree
2020-02-01 David Shahxilinx_dsp: Add multonly scratchpad var to bypass commit | commitdiff | tree
2020-02-01 Marcin Kościelnickijson: remove the 32-bit parameter special case commit | commitdiff | tree
2020-02-01 Rodrigo Alejandro... Modified the new search for files of $readmem[hb] to... commit | commitdiff | tree
2020-01-31 Rodrigo Alejandro... $readmem[hb] file inclusion is now relative to the... commit | commitdiff | tree
2020-01-31 Eddie HungMerge pull request #1668 from gsomlo/gls-abc9-external commit | commitdiff | tree
2020-01-30 Stefan Biereigeladd inheritance for pywrap generators commit | commitdiff | tree
2020-01-30 Gabriel Somloabc9: restore ability to use ABCEXTERNAL commit | commitdiff | tree
2020-01-30 Claire WolfMerge pull request #1667 from YosysHQ/clifford/verificnand commit | commitdiff | tree
2020-01-30 Claire WolfMerge pull request #1503 from YosysHQ/eddie/verific_help commit | commitdiff | tree
2020-01-30 Claire WolfMerge pull request #1654 from YosysHQ/eddie/sby_fix69 commit | commitdiff | tree
2020-01-30 Claire WolfAdd Verific support for OPER_REDUCE_NAND commit | commitdiff | tree
2020-01-29 Claire WolfMerge branch 'vector_fix' of https://github.com/Kmanfi... commit | commitdiff | tree
2020-01-29 Claire WolfMerge pull request #1662 from YosysHQ/dave/opt-reduce... commit | commitdiff | tree
2020-01-29 Claire WolfMerge pull request #1665 from YosysHQ/clifford/edifkeep commit | commitdiff | tree
2020-01-29 Claire WolfMerge pull request #1659 from YosysHQ/clifford/experimental commit | commitdiff | tree
2020-01-29 N. EngelhardtMerge pull request #1510 from pumbor/master commit | commitdiff | tree
2020-01-29 Claire WolfPreserve wires with keep attribute in EDIF back-end commit | commitdiff | tree
2020-01-29 Miodrag MilanovićMerge pull request #1559 from YosysHQ/efinix_test_fix commit | commitdiff | tree
2020-01-29 Eddie HungAdd "help -all" and "help -celltypes" sanity test commit | commitdiff | tree
2020-01-29 Eddie Hungsynth_xilinx: cleanup help commit | commitdiff | tree
2020-01-29 Eddie Hungsynth_xilinx: fix help when no active_design; fixes... commit | commitdiff | tree
2020-01-29 Marcin Kościelnickixilinx: Add simulation model for DSP48 (Virtex 4). commit | commitdiff | tree
2020-01-28 Eddie HungMerge remote-tracking branch 'origin/master' into eddie... commit | commitdiff | tree
2020-01-28 Eddie HungMerge pull request #1660 from YosysHQ/eddie/abc9_unperm... commit | commitdiff | tree
2020-01-28 Eddie HungAdd and use SigSpec::reverse() commit | commitdiff | tree
2020-01-28 Eddie HungFix unresolved conflict from #1573 commit | commitdiff | tree
2020-01-28 Miodrag MilanovicUpdated test to use assert-max commit | commitdiff | tree
2020-01-28 Claire WolfImprove logging use of experimental features commit | commitdiff | tree
2020-01-28 Claire WolfMerge pull request #1567 from YosysHQ/eddie/sat_init_wa... commit | commitdiff | tree
2020-01-28 N. EngelhardtMerge pull request #1573 from YosysHQ/eddie/xilinx_tristate commit | commitdiff | tree
2020-01-28 David Shahopt_reduce: Call check() per run rather than per optimi... commit | commitdiff | tree
2020-01-28 Pepijn de Vosredirect fuser stderr to /dev/null commit | commitdiff | tree
2020-01-28 Claire WolfMerge pull request #1553 from whitequark/manual-dffx commit | commitdiff | tree
2020-01-27 Eddie Hungabc9_ops: -check for negative arrival/required times commit | commitdiff | tree
2020-01-27 Eddie HungFix $lut input ordering -- SigSpec(std::initializer_lis... commit | commitdiff | tree
2020-01-27 Eddie HungImport tests from #1628 commit | commitdiff | tree
2020-01-27 Eddie Hungxilinx/ice40/ecp5: undo permuting LUT masks in lut_map commit | commitdiff | tree
2020-01-27 Eddie HungMerge pull request #1619 from YosysHQ/eddie/abc9_refactor commit | commitdiff | tree
2020-01-27 Eddie HungFix typo commit | commitdiff | tree
next