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gram.git
2020-07-08 Jean THOMASAdd links to various docs that have been helpful commit | commitdiff | tree
2020-07-08 Jean THOMASDrop YoWASP, build Yosys and SymbiYosys from source commit | commitdiff | tree
2020-07-08 Jean THOMASFix dram_model path in .gitattributes commit | commitdiff | tree
2020-07-08 Jean THOMASFix clock input commit | commitdiff | tree
2020-07-08 Jean THOMAScke => clk_en in SoC testbench commit | commitdiff | tree
2020-07-07 Jean THOMASUpdate cke => clk_en in test commit | commitdiff | tree
2020-07-07 Jean THOMASFix code styling commit | commitdiff | tree
2020-07-07 Jean THOMASFix code styling commit | commitdiff | tree
2020-07-07 Jean THOMASReplace cke with clk_en commit | commitdiff | tree
2020-07-07 Jean THOMASFix CRG PLL parameters (fixing #23) commit | commitdiff | tree
2020-07-06 Jean THOMASRename from cke to clk_en commit | commitdiff | tree
2020-07-06 Jean THOMASMake RefreshTimer fully synchronous (#24) commit | commitdiff | tree
2020-07-06 Jean THOMASAdd write transactions in the simulation testbench commit | commitdiff | tree
2020-07-06 Jean THOMASReduce amount of combinatorial statements to improve... commit | commitdiff | tree
2020-07-06 Jean THOMASFix formal support in FHDLTestCase commit | commitdiff | tree
2020-07-03 Jean THOMASRemove Diamond install script commit | commitdiff | tree
2020-07-03 Jean THOMASAdd SourceHut badge commit | commitdiff | tree
2020-07-03 Jean THOMASAdd .gitattributes file commit | commitdiff | tree
2020-07-03 Jean THOMASRemove Diamond install as it only comes with models... commit | commitdiff | tree
2020-07-03 Jean THOMASUse CRG parameters that actually work on hardware commit | commitdiff | tree
2020-07-03 Jean THOMASUpdate CRG with parameters that work IRL commit | commitdiff | tree
2020-07-03 Jean THOMASInvert condition in runsimcrg.sh commit | commitdiff | tree
2020-07-03 Jean THOMASRemove remainings from TRELLIS_IO commit | commitdiff | tree
2020-07-03 Jean THOMASCheck if YOSYS env var is set and use it as YOSYS execu... commit | commitdiff | tree
2020-07-03 Jean THOMASUse Yosys from YoWASP commit | commitdiff | tree
2020-07-03 Jean THOMASFix permissions for simulation script commit | commitdiff | tree
2020-07-03 Jean THOMASAdd simulation script into SourceHut builds commit | commitdiff | tree
2020-07-03 Jean THOMASExclude DDRDLLA from tree commit | commitdiff | tree
2020-07-03 Jean THOMASEnsure dramsync runs at 100Mhz, sync2x at 200Mhz commit | commitdiff | tree
2020-07-03 Jean THOMASRemove DDRDLLA commit | commitdiff | tree
2020-07-03 Jean THOMASAdd build script for SourceHut commit | commitdiff | tree
2020-07-03 Jean THOMASAdd tests in DFI Injector for odt and reset signals commit | commitdiff | tree
2020-07-03 Jean THOMASCheck for additional signals in phase injector at t=0 commit | commitdiff | tree
2020-07-03 Jean THOMASAdd DFI injector test case commit | commitdiff | tree
2020-07-03 Jean THOMASUpdate simulation gitignore commit | commitdiff | tree
2020-07-03 Jean THOMASUpdate gram simulation documentation commit | commitdiff | tree
2020-07-03 Jean THOMASAdd cleaning pass commit | commitdiff | tree
2020-07-03 Jean THOMASFix autopep8 madness commit | commitdiff | tree
2020-07-03 Jean THOMASRework CRG simulation commit | commitdiff | tree
2020-07-03 Jean THOMASExternalize CRG into its own file commit | commitdiff | tree
2020-07-03 Jean THOMASAdd devel doc commit | commitdiff | tree
2020-07-03 Jean THOMASAdd test for Refresher commit | commitdiff | tree
2020-07-03 Jean THOMASRefactor generic_test execution commit | commitdiff | tree
2020-07-03 Jean THOMASUse spaces for indentation commit | commitdiff | tree
2020-07-03 Jean THOMASAdd tests for core/refresher.py commit | commitdiff | tree
2020-07-03 Jean THOMASRemoving reset=0 attribute as it is already the default... commit | commitdiff | tree
2020-07-02 Jean THOMASUse reset signal from dramsync instead of sync commit | commitdiff | tree
2020-07-02 Jean THOMASMake RefreshPostponer more similar to LiteDRAM's commit | commitdiff | tree
2020-07-02 Jean THOMASFix RefreshPostponer output stuck to 1 commit | commitdiff | tree
2020-07-02 Jean THOMASFlatten specific parts of the designs commit | commitdiff | tree
2020-07-02 Jean THOMASAdd missing command issue strobe for ZQ calibration commit | commitdiff | tree
2020-07-02 Jean THOMASRemove PyYAML dependency commit | commitdiff | tree
2020-07-02 Jean THOMASFix register addresses, add missing command_issue strobe commit | commitdiff | tree
2020-07-02 Jean THOMASSet names to prevent CSR/DomainRenamer incompatibility commit | commitdiff | tree
2020-07-02 Jean THOMASAdd DDRDLLA patch commit | commitdiff | tree
2020-07-01 Jean THOMASFix merge commit | commitdiff | tree
2020-07-01 Jean THOMASRework indentation and add Wishbone tests commit | commitdiff | tree
2020-07-01 Jean THOMASAdd Wishbone interaction code commit | commitdiff | tree
2020-07-01 Jean THOMASAdd Wishbone interaction code commit | commitdiff | tree
2020-07-01 Jean THOMASFix Iverilog simulation commit | commitdiff | tree
2020-07-01 Jean THOMASGenerate ilang file commit | commitdiff | tree
2020-06-30 Jean THOMASBuild nMigen gateware in a specific folder commit | commitdiff | tree
2020-06-30 Jean THOMASRemove LED code in CRG commit | commitdiff | tree
2020-06-30 Jean THOMASRemove Minerva dependency commit | commitdiff | tree
2020-06-30 Jean THOMASApplying #9044c10 changes in LiteDRAM (phy/ecp5ddrphy... commit | commitdiff | tree
2020-06-29 Jean THOMASDefine simulation time as a parameter commit | commitdiff | tree
2020-06-29 Jean THOMASDefine PLL's PHASELOADREG input commit | commitdiff | tree
2020-06-29 Jean THOMASUse -n option in vvp to enable CTRL+C commit | commitdiff | tree
2020-06-29 Jean THOMASFix PLL instanciation code for CRG simulation commit | commitdiff | tree
2020-06-29 Jean THOMASDump whole module commit | commitdiff | tree
2020-06-29 Jean THOMASFix DQSBUFM floating DYNDELAY commit | commitdiff | tree
2020-06-29 Jean THOMASSet DRAM's CK_N to low commit | commitdiff | tree
2020-06-29 Jean THOMASFix autopep8 madness commit | commitdiff | tree
2020-06-29 Jean THOMASUse BB instead of TRELLIS_IO commit | commitdiff | tree
2020-06-29 Jean THOMASFix CRG, revert to resetful sync domain commit | commitdiff | tree
2020-06-29 Jean THOMASSet UART RX to 1'b1 commit | commitdiff | tree
2020-06-29 Jean THOMASAdd -Wall to simulations commit | commitdiff | tree
2020-06-26 Jean THOMASAdd testbench for SoC simulation commit | commitdiff | tree
2020-06-26 Jean THOMASUse FST instead of VCD commit | commitdiff | tree
2020-06-26 Jean THOMASExclude .fst files commit | commitdiff | tree
2020-06-26 Jean THOMASAdd DDRSoC simulation commit | commitdiff | tree
2020-06-26 Jean THOMASAdd gitignore for simulation folder commit | commitdiff | tree
2020-06-26 Jean THOMASFix PLL code commit | commitdiff | tree
2020-06-26 Jean THOMASAdd DRAM model commit | commitdiff | tree
2020-06-25 Jean THOMASFix typo commit | commitdiff | tree
2020-06-25 Jean THOMASAdd simulation code commit | commitdiff | tree
2020-06-25 Jean THOMASAdd README.md for gram tests commit | commitdiff | tree
2020-06-25 Jean THOMASAdd rddata_en, wrdata_mask tests commit | commitdiff | tree
2020-06-25 Jean THOMASAdd wrdata, wrdata_en tests to Phase Injector unit... commit | commitdiff | tree
2020-06-25 Jean THOMASFix R/W permissions to the bare minimum commit | commitdiff | tree
2020-06-25 Jean THOMASSet UART bridge SEL signals to 0xF commit | commitdiff | tree
2020-06-25 Jean THOMASAdd Wishbone read/write helpers commit | commitdiff | tree
2020-06-25 Jean THOMASUse constants for CSR addresses commit | commitdiff | tree
2020-06-25 Jean THOMASAdd bank address test commit | commitdiff | tree
2020-06-25 Jean THOMASFix DFII testing, test address set commit | commitdiff | tree
2020-06-24 Jean THOMASAdd buggy test for DFII commit | commitdiff | tree
2020-06-24 Jean THOMASFix CSR issue in PhaseInjector (r_data used for reading... commit | commitdiff | tree
2020-06-24 Jean THOMASFix CSR issue in DFII (r_data used for reading host... commit | commitdiff | tree
2020-06-24 Jean THOMASSimply arbiter when there is only 1 request to arbitrate commit | commitdiff | tree
2020-06-24 Jean THOMASEnsure we have at least one master commit | commitdiff | tree
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