2019-08-15 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into xc7dsp |
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2019-08-15 |
Eddie Hung | Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into... |
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2019-08-15 |
Eddie Hung | ffH -> ffFJKG |
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2019-08-15 |
Eddie Hung | Merge pull request #1297 from YosysHQ/eddie/fix_1284_again |
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2019-08-15 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into eddie... |
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2019-08-15 |
Clifford Wolf | Merge pull request #1275 from YosysHQ/clifford/ids |
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2019-08-15 |
Clifford Wolf | Merge branch 'master' into clifford/ids |
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2019-08-15 |
Clifford Wolf | Merge pull request #1295 from YosysHQ/eddie/fix_travis |
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2019-08-14 |
Eddie Hung | AND with an inverted input, causes X{,N}OR output to... |
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2019-08-14 |
Eddie Hung | Revert "Only sort leaves on non-ANDNOT/ORNOT cells" |
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2019-08-14 |
Eddie Hung | Revert earliest to gcc-4.8, compile iverilog with defau... |
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2019-08-14 |
Eddie Hung | Revert "Bump to gcc-5 as `__warn_memset_zero_len' symbo... |
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2019-08-14 |
Eddie Hung | Remove .0 from clang-8.0 |
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2019-08-14 |
Eddie Hung | Bump to gcc-5 as `__warn_memset_zero_len' symbol not... |
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2019-08-14 |
Eddie Hung | bionic -> xenial as its on whitelist |
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2019-08-14 |
Eddie Hung | Bump gcc from 4.8 to 4.9 as undefined reference |
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2019-08-14 |
Eddie Hung | Only sort leaves on non-ANDNOT/ORNOT cells |
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2019-08-14 |
Eddie Hung | Merge pull request #1294 from YosysHQ/revert-1288-eddie... |
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2019-08-14 |
Eddie Hung | Revert "Since $_ANDNOT_ is not symmetric, do not sort... |
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2019-08-14 |
Eddie Hung | Fixes for reverting SigSpec helper functions |
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2019-08-14 |
Eddie Hung | Perform C -> PCIN optimisation after pattern matcher |
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2019-08-14 |
Eddie Hung | Revert changes to RTLIL::SigSpec methods |
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2019-08-13 |
Eddie Hung | Only swap ports if $mul and not $__mul |
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2019-08-13 |
Eddie Hung | Add assign PCOUT = P to DSP48E1 |
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2019-08-13 |
Eddie Hung | Rename to XilinxDspPass |
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2019-08-13 |
Eddie Hung | Add DSP_A_MAXWIDTH_PARTIAL, refactor |
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2019-08-13 |
Eddie Hung | Merge pull request #1288 from YosysHQ/eddie/fix_1284 |
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2019-08-13 |
David Shah | xilinx: Rework labels for faster Verilator testing |
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2019-08-12 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into xc7dsp |
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2019-08-12 |
Eddie Hung | Since $_ANDNOT_ is not symmetric, do not sort leaves |
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2019-08-12 |
Serge Bazanski | Merge pull request #1152 from 1138-4EB/feat-docker |
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2019-08-12 |
Eddie Hung | Merge pull request #1277 from YosysHQ/eddie/fix_1262 |
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2019-08-12 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into eddie... |
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2019-08-11 |
Clifford Wolf | Add YOSYS_NO_IDS_REFCNT configuration macro |
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2019-08-11 |
Clifford Wolf | Use ID() in kernel/*, add simple ID:: hack (to be impro... |
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2019-08-11 |
Clifford Wolf | More improvements and cleanups in IdString subsystem |
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2019-08-11 |
Clifford Wolf | Use ID() macro in all of passes/opt/ |
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2019-08-11 |
Clifford Wolf | Improve API of ID() macro |
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2019-08-10 |
Eddie Hung | Merge pull request #1280 from YosysHQ/revert-1266-eddie... |
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2019-08-10 |
Eddie Hung | Wrong way around |
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2019-08-10 |
David Shah | Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER" |
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2019-08-10 |
Eddie Hung | cover_list -> cover as per @cliffordwolf |
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2019-08-10 |
Clifford Wolf | Merge pull request #1258 from YosysHQ/eddie/cleanup |
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2019-08-10 |
Clifford Wolf | Merge pull request #1261 from YosysHQ/clifford/verific_init |
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2019-08-10 |
Clifford Wolf | Merge pull request #1263 from ucb-bar/firrtl_err_on_uns... |
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2019-08-10 |
Clifford Wolf | Merge pull request #1270 from YosysHQ/eddie/alu_lcu_doc |
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2019-08-10 |
Clifford Wolf | Merge pull request #1272 from mmicko/travis_fix |
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2019-08-10 |
Clifford Wolf | Merge pull request #1274 from YosysHQ/eddie/fix_1271 |
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2019-08-10 |
Clifford Wolf | Merge pull request #1276 from YosysHQ/clifford/fix1273 |
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2019-08-10 |
Eddie Hung | Check nusers of DSP output, not whole flop |
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2019-08-10 |
Eddie Hung | Improve ice40_dsp for non-fully-32-bit adders |
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2019-08-10 |
Eddie Hung | Add wreduce to synth_ice40 -dsp as well |
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2019-08-09 |
Eddie Hung | Another filter -> if |
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2019-08-09 |
Eddie Hung | Cleanup |
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2019-08-09 |
Eddie Hung | Pack partial-product adder DSP48E1 packing |
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2019-08-09 |
Eddie Hung | Fix check |
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2019-08-09 |
Eddie Hung | Revert "Fix typo" |
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2019-08-09 |
Eddie Hung | Grammar |
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2019-08-09 |
Eddie Hung | Reformat so it shows up/looks nice when "help $alu... |
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2019-08-09 |
Eddie Hung | Separate $alu handling |
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2019-08-09 |
Eddie Hung | Add $alu tests |
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2019-08-09 |
Eddie Hung | opt_expr -fine to trim LSBs of $alu too |
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2019-08-09 |
Eddie Hung | Add alumacc versions of opt_expr tests |
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2019-08-09 |
Eddie Hung | Add new $alu test, remove wreduce |
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2019-08-09 |
Clifford Wolf | Disable NMUX, AOI3, OAI3, AOI4, OAI4 in ABC default... |
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2019-08-09 |
Eddie Hung | Cleanup some more |
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2019-08-09 |
whitequark | Merge pull request #1267 from whitequark/proc_prune... |
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2019-08-09 |
Eddie Hung | Simplify opt_expr tests using equiv_opt |
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2019-08-09 |
Eddie Hung | A bit more on where $lcu comes from |
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2019-08-09 |
Eddie Hung | Add more comments |
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2019-08-09 |
Eddie Hung | Add __STDC_FORMAT_MACROS before <inttypes.h> as per... |
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2019-08-09 |
Miodrag Milanovic | ABC requires it like this |
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2019-08-09 |
Miodrag Milanovic | Propagate parameters for Travis build |
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2019-08-08 |
Eddie Hung | Remove muxY and ffY for now |
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2019-08-08 |
Eddie Hung | Remove signed from ports in +/xilinx/dsp_map.v |
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2019-08-08 |
Eddie Hung | Rework ice40_dsp to map to SB_MAC16 earlier, and check... |
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2019-08-08 |
Eddie Hung | Combine techmap calls |
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2019-08-08 |
Eddie Hung | Only pack registers if {A,B,P}REG = 0, do not pack... |
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2019-08-08 |
Eddie Hung | Move xilinx_dsp to before alumacc |
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2019-08-08 |
Eddie Hung | Disable $dffe |
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2019-08-08 |
Eddie Hung | INMODE is 5 bits |
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2019-08-08 |
Eddie Hung | Fix copy-pasta typo |
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2019-08-08 |
Eddie Hung | Add a few comments to document $alu and $lcu |
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2019-08-08 |
Eddie Hung | Merge pull request #1264 from YosysHQ/eddie/fix_1254 |
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2019-08-08 |
Eddie Hung | Merge pull request #1266 from YosysHQ/eddie/ice40_full_... |
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2019-08-08 |
David Shah | ecp5: Replace '-dsp' with inverse logic '-nodsp' to... |
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2019-08-08 |
David Shah | ecp5: Bring up to date with mul2dsp changes |
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2019-08-08 |
David Shah | Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into... |
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2019-08-08 |
David Shah | DSP48E1 sim model: add SIMD tests |
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2019-08-08 |
David Shah | DSP48E1 model: test CE inputs |
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2019-08-08 |
David Shah | DSP48E1 sim model: fix seq tests and add preadder tests |
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2019-08-08 |
David Shah | DSP48E1 sim model: seq test working |
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2019-08-08 |
David Shah | DSP48E1 sim model: Comb, no pre-adder, mode working |
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2019-08-08 |
David Shah | [wip] sim model testing |
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2019-08-08 |
David Shah | [wip] sim model testing |
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2019-08-08 |
whitequark | proc_prune: fix handling of exactly identical assigns. |
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2019-08-08 |
Eddie Hung | Remove dump call |
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2019-08-08 |
Eddie Hung | Move tests/various/opt* into tests/opt/ |
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2019-08-08 |
Eddie Hung | Remove ice40_unlut call, simply do equiv_opt on synth_ice40 |
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2019-08-08 |
Eddie Hung | Add testcase from removed opt_ff.{v,ys} |
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next |