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yosys.git
2015-10-24
Clifford Wolf
renamed SigSpec::to_single_sigbit() to SigSpec::as_bit...
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2015-10-24
Clifford Wolf
improvement in "stat"
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2015-10-24
Clifford Wolf
Fixed driver conflict handling (various cmds)
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2015-10-24
Clifford Wolf
equiv_purge bugfix, using SigChunk in Yosys namespace
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2015-10-24
Clifford Wolf
Fixed handling of driver-driver conflicts in wreduce
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2015-10-23
Clifford Wolf
Added equiv_mark command
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2015-10-23
Clifford Wolf
Disabled "Skipping blackbox module" msg in show command
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2015-10-23
Clifford Wolf
Added support for ":" as comment symbol after ;-parsing
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2015-10-23
Clifford Wolf
Also merge $equiv cells in equiv_struct
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2015-10-23
Clifford Wolf
Improvements in equiv_struct
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2015-10-22
Clifford Wolf
Added equiv_purge
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2015-10-21
Clifford Wolf
Added equiv_struct command
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2015-10-21
Clifford Wolf
Improved inout handling in equiv_make
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2015-10-20
Clifford Wolf
Progress on cell help messages
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2015-10-17
Clifford Wolf
Progress on cell help messages
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2015-10-15
Clifford Wolf
Progress in yosys-smtbmc
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2015-10-15
Clifford Wolf
Fixed bug in verilog parser
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2015-10-15
Clifford Wolf
Improvements in yosys-smtbmc
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2015-10-15
Clifford Wolf
Bugfixes in handling of "keep" attribute on wires
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2015-10-14
Clifford Wolf
More "yosys-smtbmc -c" fixes
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2015-10-14
Clifford Wolf
Fixed yosys-smtbmc -c
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2015-10-14
Clifford Wolf
Added "prep" command
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2015-10-14
Clifford Wolf
Added more cell descriptions
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2015-10-14
Clifford Wolf
Added first help messages for cell types
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2015-10-13
Clifford Wolf
Added yosys-smtbmc copyright
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2015-10-13
Clifford Wolf
Improvements in yosys-smtbmc
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2015-10-13
Clifford Wolf
Added yosys-smtbmc
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2015-10-13
Clifford Wolf
Implemented smtbmc.py -i
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2015-10-13
Clifford Wolf
Added smtbmc.py
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2015-10-13
Clifford Wolf
Added write_smt2 -wires
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2015-10-13
Clifford Wolf
Added examples/ top-level directory
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2015-10-13
Clifford Wolf
SystemVerilog also has assume(), added implicit -D...
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2015-10-13
Clifford Wolf
Merge branch 'master' of https://github.com/rubund...
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2015-10-13
Clifford Wolf
Fixed "flatten" for unconnected inout ports
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2015-10-10
Ruben Undheim
Use DESTDIR as defined in https://gnu.org/prep/standard...
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2015-10-10
Ruben Undheim
Use LDFLAGS, CXXFLAGS and CPPFLAGS from the environment...
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2015-10-07
Clifford Wolf
Added support for "parameter" and "localparam" in globa...
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2015-10-01
Clifford Wolf
Fixed complexity of assigning to vectors in constant...
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2015-09-30
Clifford Wolf
Fixed detection of unconditional $readmem[hb]
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2015-09-27
Clifford Wolf
Added edgetypes command
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2015-09-26
Clifford Wolf
Some cleanups in qwp
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2015-09-25
Clifford Wolf
Added "test_cell -noeval"
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2015-09-25
Clifford Wolf
Added wreduce $mul support and fixed signed $mul opt_co...
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2015-09-25
Clifford Wolf
Bugfix in bram read-enable code
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2015-09-25
Clifford Wolf
Bugfixes in $readmem[hb]
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2015-09-25
Clifford Wolf
Bugfixes in writing of memories as Verilog
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2015-09-25
Clifford Wolf
Fixed segfault in AstNode::asReal
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2015-09-25
Clifford Wolf
Added read-enable to memory model
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2015-09-24
Clifford Wolf
Added pivoting to qwp solver
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2015-09-24
Clifford Wolf
Improved qwp performance
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2015-09-24
Clifford Wolf
Added statistics summary to "qwp"
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2015-09-24
Clifford Wolf
Fixed memory_bram for ROMs in BRAMs with write-enable...
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2015-09-24
Clifford Wolf
Fixed AstNode::mkconst_bits() segfault on zero-sized...
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2015-09-23
Clifford Wolf
Added read_verilog -nodpi
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2015-09-23
Clifford Wolf
Bugfix in handling of multi-dimensional memories
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2015-09-23
Clifford Wolf
Warning for $display/$write outside initial block
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2015-09-23
Clifford Wolf
Fixed support for $write system task
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2015-09-22
Clifford Wolf
Fixed detection of "task foo(bar);" syntax error
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2015-09-22
Clifford Wolf
Fixed multi-level prefix resolving
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2015-09-22
Clifford Wolf
Fixed segfault on invalid verilog constant 1'b_
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2015-09-21
Clifford Wolf
Fixed emcc build
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2015-09-21
Clifford Wolf
Do not detect fsm state registers with init attribute
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2015-09-21
Clifford Wolf
Bugfix in "qwp" pass
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2015-09-20
Clifford Wolf
Improvements and fixes in "qwp" pass
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2015-09-20
Clifford Wolf
Added "qwp -dump"
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2015-09-20
Clifford Wolf
Added "qwp" command
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2015-09-19
Andrew Zonenberg
Improvements to $display system task
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2015-09-18
Clifford Wolf
Added nlutmap
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2015-09-18
Clifford Wolf
Added lut2mux pass
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2015-09-18
Clifford Wolf
Cosmetic fix in Module::addLut()
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2015-09-18
Clifford Wolf
Added buffer detection to "abc -lut"
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2015-09-18
Clifford Wolf
Renamed GreenPAK4 cells, improved GP4 DFF mapping
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2015-09-18
Clifford Wolf
Added support for "dfflibmap -liberty +/..."
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2015-09-18
Clifford Wolf
Added detection of "mux inverter" chains in opt_const
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2015-09-18
Clifford Wolf
Added $logic_not handling to fsm_detect
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2015-09-18
Clifford Wolf
Added $finish and $display to README
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2015-09-18
Clifford Wolf
Merge branch 'feat-finish-disp'
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2015-09-18
Clifford Wolf
Added AST_INITIAL checks for $finish and $display
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2015-09-18
Andrew Zonenberg
Initial implementation of $display()
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2015-09-18
Andrew Zonenberg
Initial implementation of $finish()
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2015-09-16
Clifford Wolf
Fixed copy&paste typo in synth_greenpak4
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2015-09-16
Clifford Wolf
Added GreenPAK4 skeleton
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2015-09-12
Clifford Wolf
Fixed sharing of $memrd cells
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2015-09-10
Clifford Wolf
Fixed ice40 handling of negclk RAM40
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2015-09-01
Clifford Wolf
Fixed port ordering in "splitnets" cmd
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2015-09-01
Clifford Wolf
gcc-4.6 build fixes
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2015-09-01
Andrei Errapart
Removed unnecessary cast.
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2015-09-01
Andrei Errapart
Microsoft Visual C++ fixes in hashlib; template special...
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2015-09-01
Andrei Errapart
Microsoft Visual C++ fix for log.h.
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2015-08-31
Clifford Wolf
Fixed iopadmap help message
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2015-08-31
Clifford Wolf
Added SigMap::allbits()
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2015-08-31
Clifford Wolf
Using dict<> and pool<> in alumacc pass
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2015-08-31
Clifford Wolf
Added "yosys-smt2-wire" tag support to smt2 back-end
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2015-08-22
Clifford Wolf
Fixed handling of memory read without address
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2015-08-22
Clifford Wolf
Switched to Python 3
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2015-08-18
Clifford Wolf
Added sat -show-regs, -show-public, -show-all
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2015-08-18
Clifford Wolf
Bugfix in fsm_detect for complex muxtrees
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2015-08-18
Clifford Wolf
Properly clean up unused "init" attributes
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2015-08-17
Clifford Wolf
Small corrections to const2ast warning messages
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2015-08-17
Florian Zeitz
Check base-n literals only contain valid digits
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