gem5.git
2013-01-08 Lluís Vilanovautil: add m5_fail op.
2013-01-08 Tao Zhangsim: Fix early termination in multi-core simulation...
2013-01-08 Mitch Hayengaarm: add access syscall for ARM SE mode
2013-01-08 Mitch Hayengamem: Make LL/SC locks fine grained
2013-01-08 Mitch Hayengamem: Fix use-after-free bug
2013-01-07 Andreas Sandbergdev: Fix infinite recursion in DMA devices
2013-01-07 Andreas Sandbergutil: Fix stack corruption in the m5 util
2013-01-07 Sascha Bischoffstats: Fix swig wrapping for Tick in stats
2013-01-07 Ali Saidistats: update stats for previous changes.
2013-01-07 Andreas Sandbergcpu: Unify the serialization code for all of the CPU...
2013-01-07 Andreas Sandbergtests: Add CPU switching tests
2013-01-07 Andreas Sandbergcpu: Flush TLBs on switchOut()
2013-01-07 Andreas Sandbergmem: Fix guest corruption when caches handle uncacheabl...
2013-01-07 Andreas Sandbergcpu: Rewrite O3 draining to avoid stopping in microcode
2013-01-07 Andreas Sandbergcpu: Make sure that a drained atomic CPU isn't executin...
2013-01-07 Andreas Sandbergcpu: Make sure that a drained timing CPU isn't executin...
2013-01-07 Andreas Sandbergcpu: Fix broken thread context handover
2013-01-07 Andreas Sandbergcpu: Fix O3 LSQ debug dumping constness and formatting
2013-01-07 Andreas Sandbergarm: Invalidate cached TLB configuration in drainResume
2013-01-07 Andreas Sandbergarm: Fix draining of the pagetable walker when squashing
2013-01-07 Andreas Sandbergcpu: Fix broken squashAfter implementation in O3 CPU
2013-01-07 Andreas Sandbergo3 cpu: Remove unused variables
2013-01-07 Andreas Sandbergtests: Update the ignore regexps to reflect the M5...
2013-01-07 Andreas Sandbergsim: Remove unused variables
2013-01-07 Andreas Sandbergcpu: Rename defer_registration->switched_out
2013-01-07 Andreas Sandbergcpu: Remove unused params.hh header file in inorder CPU
2013-01-07 Andreas Sandbergarm: Remove the register mapping hack used when copying TCs
2013-01-07 Andreas Sandbergcpu: Introduce sanity checks when switching between...
2013-01-07 Andreas Sandbergcpu: Correctly call parent on switchOut() and takeOverF...
2013-01-07 Andreas Sandbergcpu: Unify SimpleCPU and O3 CPU serialization code
2013-01-07 Andreas Sandbergcpu: Initialize the O3 pipeline from startup()
2013-01-07 Andreas Sandbergcpu: Implement a flat register interface in thread...
2013-01-07 Andreas Sandbergarch: Move the ISA object to a separate section
2013-01-07 Andreas Sandbergcpu: Check that the memory system is in the correct...
2013-01-07 Andreas Sandbergarch: Add support for invalidating TLBs when draining
2013-01-07 Andreas Sandbergmem: Remove the IIC replacement policy
2013-01-07 Andreas Hanssondev: Do not serialize timer parameters
2013-01-07 Andreas Hanssonscons: Enforce gcc >= 4.4 or clang >= 2.9 and c++0x...
2013-01-07 Andreas Hanssonscons: Remove stale compiler options
2013-01-07 Andreas Hanssonsim: Fatal if a clocked object is set to have a clock...
2013-01-07 Andreas Hanssondev: Make the ethernet devices use a non-zero clock
2013-01-07 Andreas Sandbergscons: Whitelist useful environment variables
2013-01-07 Chander SudanthiARM: pl111/LCD framebuffer checkpointing fix
2013-01-07 Andreas Sandbergarch: Fix broken M5VarArgsFault initialization
2013-01-07 Andreas Hanssonmem: Merge ranges that are part of the conf table
2013-01-07 Andreas Hanssonbase: Add support for merging of interleaved address...
2013-01-07 Andreas Hanssonmem: Add interleaving bits to the address ranges
2013-01-07 Andreas Hanssonconfig: Traverse lists when visiting children in all...
2013-01-07 Andreas Hanssonbase: Simplify the AddrRangeMap by removing unused...
2013-01-07 Andreas Hanssonconfig: Do not use hardcoded physmem in fs script
2013-01-07 Andreas Hanssonmem: Tidy up bus addr range debug messages
2013-01-07 Andreas Hanssonmem: Skip address mapper range checks to allow more...
2013-01-07 Andreas Hanssonbase: Encapsulate the underlying fields in AddrRange
2013-01-07 Andreas Hanssonmem: Remove the joining of neighbouring ranges
2013-01-07 Andreas Hanssoncpu: Share the send functionality between traffic gener...
2013-01-07 Andreas Hanssoncpu: Add support for protobuf input for the trace generator
2013-01-07 Andreas Sandbergtests: Add support for skipping tests, skip EIO tests...
2013-01-07 Andreas Hanssoncpu: Encapsulate traffic generator input in a stream
2013-01-07 Andreas Hanssonbase: Add wrapped protobuf input stream
2013-01-07 Andreas Hanssonmem: Add tracing support in the communication monitor
2013-01-07 Andreas Hanssonbase: Add wrapped protobuf output streams
2013-01-07 Andreas Hanssonscons: Add support for google protobuf building
2013-01-07 Andreas Sandbergarm: Fix DMA event handling bug in the PL111 model
2013-01-07 Andreas Hanssondev: Fix the Pl111 timings by separating pixel and...
2013-01-07 Andreas Hanssonstats: Update DRAM regression stats to match new config
2013-01-07 Andreas Hanssonconfig: Reduce DRAM controller regression traffic rate
2013-01-07 Andreas Hanssoncpu: Fix the traffic gen read percentage
2013-01-07 Andreas Hanssonmem: Add sanity check to packet queue size
2013-01-07 Andreas Hanssonruby: Fix missing cxx_header in Switch
2013-01-07 Andreas Hanssonscons: Fix libelf linking errors when using clang/llvm
2013-01-07 Chris Emmonsconfig: Replace second keyboard with a mouse.
2013-01-07 Andreas Hanssonmem: Fix a bug in the memory serialization file naming
2013-01-07 Andreas Sandbergarm: Make ID registers ISA parameters
2013-01-07 Andreas Sandbergarch: Make the ISA class inherit from SimObject
2013-01-07 Ali Saidio3: Fix issue with LLSC ordering and speculation
2013-01-07 Ali Saidicpu: rename the misleading inSyscall to noSquashFromTC
2013-01-07 Ali Saiditests: Always specify memory mode in every test system.
2013-01-07 Andreas Sandbergtests: Create base classes to encapsulate common test...
2013-01-07 Ali Saidicache: add note about where conflicts are handled
2013-01-05 Nilay Vaishregressions: stats update due to decoder changes
2013-01-05 Gabe BlackDecoder: Remove the thread context get/set from the...
2013-01-05 Gabe BlackX86: Move address based decode caching in front of...
2013-01-05 Gabe BlackSPARC: Keep a copy of the current ASI in the decoder.
2013-01-05 Gabe BlackARM: Keep a copy of the fpscr len and stride fields...
2012-12-30 Nilay Vaishx86 regressions: stats update due to new x87 instructions
2012-12-30 Nilay Vaishx86: implement x87 fp instruction fnstsw
2012-12-30 Nilay Vaishx86: implement x87 fp instruction fsincos
2012-12-12 Nilay Vaisharm regressions: updates to config.ini, terminal files
2012-12-12 Nathanael Premillieuarm: set uopSet_uop as conditional or unconditional...
2012-12-12 Nathanael Premillieuarm: set movret_uop as conditional or unconditional...
2012-12-11 Nilay Vaishregressions: stats update due to stats from ruby prefetcher
2012-12-11 Nilay Vaishruby: add support for prefetching to MESI protocol
2012-12-11 Nilay Vaishruby: modify the directed tester to read/write streams
2012-12-11 Nilay Vaishruby: change slicc to allow for constructor args
2012-12-11 Nilay Vaishruby: add a prefetcher
2012-12-11 Nilay Vaishruby: add functions for computing next stride/page...
2012-12-06 Nilay Vaishregression test: update a couple of config.ini files
2012-12-06 Erik TomuskTournamentBP: Fix some bugs with table sizes and counters
2012-12-06 Malek Muslehinorder cpu: add missing DPRINTF argument
2012-12-06 Nathanael Premillieuo3 cpu: remove some unused buggy functions in the lsq
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