libreriscv.git
2020-05-05 YehowshuaAdd getting started instruction. A bit redundant, but...
2020-05-05 Yehowshua(no commit message)
2020-05-05 YehowshuaLink to SOC Documentation
2020-05-05 Yehowshua(no commit message)
2020-05-05 YehowshuaAdd Link To Documentation
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2020-05-05 Michael NolanRevert ""
2020-05-05 Michael NolanRevert ""
2020-05-05 Michael NolanRevert ""
2020-05-05 Michael NolanRevert ""
2020-05-05 Yehowshua(no commit message)
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2020-05-04 Yehowshua(no commit message)
2020-05-04 Luke Kenneth... clarify see how can i learn
2020-05-04 Luke Kenneth... split out developer how-can-i-help, also reference...
2020-05-04 Luke Kenneth... update priorities
2020-05-04 Luke Kenneth... linebreak
2020-05-04 Luke Kenneth... missed two brs
2020-05-04 Luke Kenneth... move example to separate section, cleanup HTML
2020-05-04 Yehowshua(no commit message)
2020-05-04 Yehowshua(no commit message)
2020-05-03 Luke Kenneth... describe concurrent computational unit
2020-05-03 Luke Kenneth... correct image name
2020-05-03 Luke Kenneth... add FU-FU and FU-Regs vectors
2020-05-03 Luke Kenneth... add additional images
2020-05-03 Luke Kenneth... whitespace
2020-05-03 Luke Kenneth... whitespace
2020-05-03 lkcl(no commit message)
2020-05-03 Luke Kenneth... mention concurrent units, update regfile image to doubl...
2020-05-03 Luke Kenneth... mention that the 4x4 crossbar is a major data bottleneck
2020-05-03 Luke Kenneth... update diagram and include text on regfile arrangement
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2020-05-03 Luke Kenneth... add regfile diagram
2020-05-03 Luke Kenneth... add walkthrough video for memory and cache
2020-05-02 Yehowshua(no commit message)
2020-05-02 Yehowshua(no commit message)
2020-05-01 Luke Kenneth... whitespace
2020-05-01 programmerjakeadd load-store unit ideas
2020-05-01 programmerjakeadd prefix sum
2020-04-30 lkcl(no commit message)
2020-04-30 Luke Kenneth... add walk-through videos for LD/ST CompUnit
2020-04-30 Luke Kenneth... update new version of LD/ST which can do "update" mode...
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2020-04-28 Luke Kenneth... update wr-any signal in ldstcomp
2020-04-28 Luke Kenneth... update ld/st diagram to deal with ST-with-update
2020-04-28 Luke Kenneth... missing signals on SR Latches
2020-04-28 Luke Kenneth... add discussion links for LD/ST Comp Unit
2020-04-28 Luke Kenneth... corrections to firing WR latch
2020-04-28 Luke Kenneth... add text to ld_st_comp_unit image
2020-04-28 Luke Kenneth... update LD/ST comp unit simplify explanation for now
2020-04-28 Luke Kenneth... add new update-capable ld/st comp unit
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2020-04-27 Luke Kenneth... update text description to match diagram on L0 cache...
2020-04-27 Luke Kenneth... update image size
2020-04-27 Luke Kenneth... revise diagram to include twin-l0-port
2020-04-27 Luke Kenneth... add memory interface requirements section
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2020-04-23 Luke Kenneth... add link to list
2020-04-23 programmerjakeadd placeholder alternative memory interface design...
2020-04-23 programmerjakeadd link to alternative memory interface idea
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2020-04-22 Luke Kenneth... mention misaligned exception;
2020-04-22 Luke Kenneth... add link to comp.arch
2020-04-22 Luke Kenneth... write-up on twin L0 cache/buffer
2020-04-22 Luke Kenneth... add twin L0 cache/buffer diagram
2020-04-22 Luke Kenneth... add twin L0 cache/buffer
2020-04-22 Luke Kenneth... add memory and cache page for 180nm ASIC
2020-04-22 Luke Kenneth... add 180nm memory layout diagram
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