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riscv-isa-sim.git
2017-05-05 Andrew WatermanTrap superpage PTEs when PPN LSBs are set commit | commitdiff | tree
2017-05-01 Andrew WatermanFix segfault when accessing bad memory addresses commit | commitdiff | tree
2017-05-01 Andrew WatermanSet default entry point from ELF commit | commitdiff | tree
2017-05-01 Andrew WatermanAdd option to set start pc commit | commitdiff | tree
2017-05-01 Andrew WatermanSupport more flexible main memory allocation commit | commitdiff | tree
2017-05-01 Andrew WatermanStore both host & target address in soft TLB commit | commitdiff | tree
2017-04-25 Andrew WatermanFMV.X.S/FMV.S.X -> FMV.X.W/FMV.W.X commit | commitdiff | tree
2017-04-25 Andrew WatermanRemove hret instruction commit | commitdiff | tree
2017-04-11 Andrew WatermanImplement new FP encoding commit | commitdiff | tree
2017-04-08 Andrew WatermanImplement vectored interrupt proposal commit | commitdiff | tree
2017-04-06 Andrew WatermanAdd --enable-misaligned option for misaligned ld/st... commit | commitdiff | tree
2017-04-01 Yunsup Leeupdate encoding.h to get PMP updates commit | commitdiff | tree
2017-04-01 Andrew WatermanUpdate LICENSE copyright date commit | commitdiff | tree
2017-03-30 Wesley W. Terpstrafdt: move interrupt controller into its own node commit | commitdiff | tree
2017-03-28 Andrew WatermanSet badaddr=0 on illegal instruction traps commit | commitdiff | tree
2017-03-28 Andrew WatermanOn EBREAK, set badaddr to pc commit | commitdiff | tree
2017-03-27 Andrew WatermanSeparate page faults from physical memory access exceptions commit | commitdiff | tree
2017-03-25 Andrew WatermanDefault to 2 GiB of memory commit | commitdiff | tree
2017-03-23 Andrew WatermanRequire little-endian host commit | commitdiff | tree
2017-03-22 Wesley W. Terpstrariscv: replace rtc device with a real clint implementation commit | commitdiff | tree
2017-03-22 Wesley W. Terpstrasim: declare cores as interrupt-controllers for clint commit | commitdiff | tree
2017-03-21 Wesley W. Terpstrabootrom: set a0 to hartid and a1 to dtb before boot commit | commitdiff | tree
2017-03-21 Wesley W. Terpstraconfigstring: rename variables to dts commit | commitdiff | tree
2017-03-21 Wesley W. Terpstrariscv: remove dependency on num_cores commit | commitdiff | tree
2017-03-21 Wesley W. Terpstrabootrom: include compiled dtb commit | commitdiff | tree
2017-03-21 Wesley W. Terpstrasim: create DTS instead of config string commit | commitdiff | tree
2017-03-21 Wesley W. Terpstrasim: define emulated CPU clock rate to be 1GHz commit | commitdiff | tree
2017-03-21 Wesley W. Terpstraautoconf: put location of 'dtc' into config.h commit | commitdiff | tree
2017-03-20 Andrew WatermanPUM -> SUM; expose MXR to S-mode commit | commitdiff | tree
2017-03-16 Andrew WatermanSimplify interrupt-stack discipline commit | commitdiff | tree
2017-03-13 Andrew WatermanImplement mstatus.TW, mstatus.TVM, and mstatus.TSR commit | commitdiff | tree
2017-03-07 Andrew WatermanDon't overload illegal instruction trap in interactive... commit | commitdiff | tree
2017-02-27 Andrew WatermanSv57 and Sv64 are not spec'd yet commit | commitdiff | tree
2017-02-25 Andrew WatermanNew counter enable scheme commit | commitdiff | tree
2017-02-21 Andrew Watermanserialize simulator on wfi commit | commitdiff | tree
2017-02-21 Andrew WatermanTake M-mode interrupts over S-mode interrupts commit | commitdiff | tree
2017-02-21 Andrew Watermanpermit MMIO loads to MSIP bit commit | commitdiff | tree
2017-02-19 Andrew WatermanMake HW setting of PTE A/D bits optional (by configure... commit | commitdiff | tree
2017-02-18 Andrew WatermanSpike uarch needs TLB flush after SPTBR write commit | commitdiff | tree
2017-02-15 Andrew Watermansfence.vm -> sfence.vma commit | commitdiff | tree
2017-02-08 Andrew WatermanEncode VM type in sptbr, not mstatus commit | commitdiff | tree
2017-02-07 Tim NewsomeMerge pull request #83 from bacam/gdb-protocol-fixes commit | commitdiff | tree
2017-02-03 Andrew WatermanFix interrupt delegation for coprocessors commit | commitdiff | tree
2017-02-02 Andrew WatermanFor FMIN(sNaN, x) and FMIN(qNaN, qNaN), return canonica... commit | commitdiff | tree
2017-02-02 Andrew WatermanSet xPIE=1 on xRET commit | commitdiff | tree
2017-01-08 Andrew WatermanOnly allow SIP.SSIP to be toggled if the interrupt... commit | commitdiff | tree
2017-01-08 Andrew WatermanMake SIP.STIP read-only commit | commitdiff | tree
2017-01-06 David CravenComply with GNU coding standards. commit | commitdiff | tree
2016-12-30 Brian CampbellOnly read exception flag in gdb register read/write... commit | commitdiff | tree
2016-12-21 Brian CampbellFix gdb communication error (#82) commit | commitdiff | tree
2016-12-21 Brian CampbellRemove extra gdb protocol responses on register writes commit | commitdiff | tree
2016-12-21 Brian CampbellFix gdb protocol register read of S0 commit | commitdiff | tree
2016-12-17 Stefan O'RearUse correct format codes for reg_t and size_t commit | commitdiff | tree
2016-12-16 Tim NewsomeFix single stepping over faulting instructions. (#80) commit | commitdiff | tree
2016-12-12 Tim NewsomeReuse the ebreak constants in encoding.h. commit | commitdiff | tree
2016-12-01 Andy WrightAdded comments about the modified Duff's Device in... commit | commitdiff | tree
2016-11-14 Andrew WatermanFix 32-bit host portability bug commit | commitdiff | tree
2016-11-12 Ben GamariEnsure that g++ knows it is building a PCH (#75) commit | commitdiff | tree
2016-11-10 Andrew WatermanAMOs should always return store faults, not load faults commit | commitdiff | tree
2016-10-31 Tim NewsomeMake reading/writing fpu regs work. commit | commitdiff | tree
2016-10-31 Tim NewsomeMinor code cleanup. commit | commitdiff | tree
2016-10-31 Tim NewsomeCheck for exception after register write. commit | commitdiff | tree
2016-10-28 Tim NewsomeCheck for exception after reading a register. commit | commitdiff | tree
2016-10-28 Tim NewsomeFix error message. commit | commitdiff | tree
2016-10-25 Tim NewsomeIncrease gdb receive buffer. commit | commitdiff | tree
2016-10-10 Andrew WatermanDon't force load trigger timing to After commit | commitdiff | tree
2016-10-07 Tim NewsomeDon't die when gdb thinks XLEN is 64 but it's 32. commit | commitdiff | tree
2016-09-30 Tim NewsomeReturn an error to gdb when memory reads fail. (#71) commit | commitdiff | tree
2016-09-29 Tim NewsomeUpdate trigger behavior. (#70) commit | commitdiff | tree
2016-09-13 Scott Beamerrestore clang support by fixing printf identifiers commit | commitdiff | tree
2016-09-10 Andrew Watermanallow MAFDC bits in MISA to be modified commit | commitdiff | tree
2016-09-06 Tim NewsomeRemove generic debug tests. (#65) commit | commitdiff | tree
2016-09-02 Andrew WatermanMerge pull request #62 from riscv/trigger commit | commitdiff | tree
2016-09-02 Tim NewsomeMerge branch 'master' into trigger commit | commitdiff | tree
2016-09-02 Tim NewsomeRebuild debug ROM because CSR encoding changed. commit | commitdiff | tree
2016-09-02 Tim NewsomeSupport triggers on TLB misses. commit | commitdiff | tree
2016-09-01 Tim NewsomeTheoretically support trigger timing. commit | commitdiff | tree
2016-08-31 Tim NewsomeRename tdata[0-2] to tdata[1-3]. commit | commitdiff | tree
2016-08-31 Tim NewsomeSave/restore tselect. Set dmode. commit | commitdiff | tree
2016-08-29 Tim NewsomeFix indent. commit | commitdiff | tree
2016-08-29 Tim NewsomeRename tdata0--tdata2 to tdata1--tdata3. commit | commitdiff | tree
2016-08-27 Andrew WatermanAdd (degenerate) performance counter facility commit | commitdiff | tree
2016-08-26 Andrew WatermanAllow reads from tdrdata registers commit | commitdiff | tree
2016-08-26 Andrew Watermanpartially update spike to newer debug spec commit | commitdiff | tree
2016-08-26 Andrew WatermanFix spike interactive (-d) mode commit | commitdiff | tree
2016-08-23 Andrew Watermanremove HWBPCOUNT field of DCSR commit | commitdiff | tree
2016-08-22 Tim NewsomeImplement address and data triggers. commit | commitdiff | tree
2016-08-17 Andrew WatermanAllow mstatus.MPP to store bad values; instead, validat... commit | commitdiff | tree
2016-08-16 Colin Schmidtremove old rvc directory (#61) commit | commitdiff | tree
2016-07-28 Tim NewsomeAdd support for virtual priv register. (#59) commit | commitdiff | tree
2016-07-22 Andrew WatermanSet U bit in misa register commit | commitdiff | tree
2016-07-19 Tim NewsomeMake address translation work in 32-bit. (#58) commit | commitdiff | tree
2016-07-13 Tim NewsomeFix single step over csrw instructions. (#57) commit | commitdiff | tree
2016-07-12 Andrew WatermanDon't treat RVC NOP as illegal instruction commit | commitdiff | tree
2016-07-12 Andrew WatermanFix page table walker not respecting valid bit commit | commitdiff | tree
2016-07-06 Andrew WatermanUpdate to new PTE format commit | commitdiff | tree
2016-07-01 Tim NewsomeRemove debug printf that was cluttering up output. commit | commitdiff | tree
2016-06-29 Andrew WatermanDisassemble RVC instructions based on XLEN commit | commitdiff | tree
2016-06-28 Tim NewsomeMake gdbserver code work with small Debug RAM. commit | commitdiff | tree
2016-06-28 Tim NewsomeSupport debugging 32-bit spike instances. commit | commitdiff | tree
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