projects / yosys.git / shortlog
? search:
summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next
yosys.git
2019-01-07 Clifford WolfBugfix in $memrd sharing commit | commitdiff | tree
2019-01-07 Clifford WolfMerge pull request #782 from whitequark/flowmap_dfs commit | commitdiff | tree
2019-01-07 Clifford WolfSwitch "bugpoint" from system() to run_command() commit | commitdiff | tree
2019-01-07 Clifford WolfMerge pull request #783 from whitequark/bugpoint commit | commitdiff | tree
2019-01-07 whitequarkbugpoint: new pass. commit | commitdiff | tree
2019-01-06 whitequarkflowmap: construct a max-volume max-flow min-cut, not... commit | commitdiff | tree
2019-01-06 Clifford WolfMerge pull request #780 from phire/rename_from_wire commit | commitdiff | tree
2019-01-06 Scott MansellRename cells based on the wires they drive. commit | commitdiff | tree
2019-01-05 Clifford WolfAdd skeleton Yosys-Libero igloo2 example project commit | commitdiff | tree
2019-01-05 Clifford WolfBugfix in Verilog string handling commit | commitdiff | tree
2019-01-04 whitequarkflowmap: add -minlut option, to allow postprocessing... commit | commitdiff | tree
2019-01-04 Clifford WolfMerge pull request #777 from mmicko/achronix_cell_sim_fix commit | commitdiff | tree
2019-01-04 Miodrag MilanovicFix cells_sim.v for Achronix FPGA commit | commitdiff | tree
2019-01-04 Clifford WolfRemove -m32 Verific eval lib build instructions commit | commitdiff | tree
2019-01-04 Clifford WolfMerge pull request #776 from mmicko/unify_noflatten commit | commitdiff | tree
2019-01-04 Clifford WolfUpdate Verific default path commit | commitdiff | tree
2019-01-04 whitequarkflowmap: cleanup for clarity. NFCI. commit | commitdiff | tree
2019-01-04 Miodrag MilanovicUnify usage of noflatten among architectures commit | commitdiff | tree
2019-01-04 whitequarkflowmap: improve debug graph output. NFC. commit | commitdiff | tree
2019-01-04 whitequarkflowmap: add link to longer version of paper. NFC. commit | commitdiff | tree
2019-01-03 Clifford WolfMerge pull request #775 from whitequark/opt_flowmap commit | commitdiff | tree
2019-01-03 whitequarkflowmap: new techmap pass. commit | commitdiff | tree
2019-01-02 Clifford WolfMerge pull request #770 from whitequark/opt_expr_cmp commit | commitdiff | tree
2019-01-02 whitequarkopt_expr: improve simplification of comparisons with... commit | commitdiff | tree
2019-01-02 Clifford WolfMerge pull request #755 from Icenowy/anlogic-dram-init commit | commitdiff | tree
2019-01-02 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys commit | commitdiff | tree
2019-01-02 Clifford WolfMerge pull request #750 from Icenowy/anlogic-ff-init commit | commitdiff | tree
2019-01-02 Clifford WolfMerge pull request #773 from whitequark/opt_lut_elim_fixes commit | commitdiff | tree
2019-01-02 Clifford WolfMerge pull request #772 from whitequark/synth_lut commit | commitdiff | tree
2019-01-02 Clifford WolfMerge pull request #771 from whitequark/techmap_cmp2lut commit | commitdiff | tree
2019-01-02 Clifford WolfImprove VerificImporter support for writes to asymmetri... commit | commitdiff | tree
2019-01-02 Clifford WolfFix VerificImporter asymmetric memories error message commit | commitdiff | tree
2019-01-02 Clifford WolfMerge pull request #769 from whitequark/typos commit | commitdiff | tree
2019-01-02 whitequarkFix typographical and grammatical errors and inconsiste... commit | commitdiff | tree
2019-01-02 whitequarkopt_lut: reflect changes in sigmap. commit | commitdiff | tree
2019-01-02 whitequarkopt_lut: use a worklist, and revisit cells affected... commit | commitdiff | tree
2019-01-02 whitequarkopt_lut: count eliminated cells, and set opt.did_someth... commit | commitdiff | tree
2019-01-02 whitequarksynth_ice40: use 4-LUT coarse synthesis mode. commit | commitdiff | tree
2019-01-02 whitequarksynth: add k-LUT mode. commit | commitdiff | tree
2019-01-02 whitequarksynth: improve script documentation. NFC. commit | commitdiff | tree
2019-01-02 whitequarkcmp2lut: new techmap pass. commit | commitdiff | tree
2019-01-02 whitequarkopt_expr: refactor simplification of unsigned X<onehot... commit | commitdiff | tree
2019-01-02 whitequarkopt_expr: refactor simplification of signed X>=0 and... commit | commitdiff | tree
2019-01-02 whitequarkopt_expr: simplify any unsigned comparisons with all... commit | commitdiff | tree
2019-01-01 Clifford WolfMerge pull request #768 from whitequark/opt_lut_elim commit | commitdiff | tree
2018-12-31 whitequarkopt_lut: eliminate LUTs evaluating to constants or... commit | commitdiff | tree
2018-12-31 Clifford WolfFix handling of (* keep *) wires in wreduce commit | commitdiff | tree
2018-12-31 Clifford WolfMerge pull request #766 from Icenowy/anlogic-latches commit | commitdiff | tree
2018-12-29 Larry DoolittleFix 7 instances of add_share_file to add_gen_share_file commit | commitdiff | tree
2018-12-29 Larry DoolittleSquelch a little more trailing whitespace commit | commitdiff | tree
2018-12-25 Icenowy Zhenganlogic: add latch cells commit | commitdiff | tree
2018-12-23 Clifford WolfMerge pull request #761 from whitequark/proc_clean_partial commit | commitdiff | tree
2018-12-23 Clifford WolfAdd "read_ilang -[no]overwrite" commit | commitdiff | tree
2018-12-23 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys commit | commitdiff | tree
2018-12-23 whitequarkproc_clean: remove any empty cases if all cases use... commit | commitdiff | tree
2018-12-22 Clifford WolfMerge pull request #757 from whitequark/manual_mem commit | commitdiff | tree
2018-12-22 whitequarkproc_clean: remove any empty cases at the end of the... commit | commitdiff | tree
2018-12-21 whitequarkmanual: make description of $meminit ports match reality. commit | commitdiff | tree
2018-12-21 Clifford WolfMerge pull request #758 from whitequark/tcl_script_args commit | commitdiff | tree
2018-12-21 Clifford WolfMerge pull request #759 from whitequark/memory_collect_... commit | commitdiff | tree
2018-12-21 whitequarkmemory_collect: do not truncate 'x from \INIT. commit | commitdiff | tree
2018-12-20 whitequarkmanual: fix typos. commit | commitdiff | tree
2018-12-20 whitequarktcl: add support for passing arguments to scripts. commit | commitdiff | tree
2018-12-20 whitequarkmanual: document $meminit cell and memory_* passes. commit | commitdiff | tree
2018-12-19 Icenowy Zhenganlogic: implement DRAM initialization commit | commitdiff | tree
2018-12-19 Clifford WolfMerge pull request #752 from Icenowy/anlogic-lut-cost commit | commitdiff | tree
2018-12-19 Clifford WolfMerge pull request #753 from Icenowy/anlogic-makefile-fix commit | commitdiff | tree
2018-12-19 Clifford WolfMerge pull request #749 from Icenowy/anlogic-dram-fix commit | commitdiff | tree
2018-12-19 Icenowy Zhenganlogic: fix Makefile.inc commit | commitdiff | tree
2018-12-19 Icenowy ZhengAnlogic: let LUT5/6 have more cost than LUT4- commit | commitdiff | tree
2018-12-18 Clifford WolfMinor style fixes commit | commitdiff | tree
2018-12-18 Clifford WolfMerge pull request #748 from makaimann/add-btor-ops commit | commitdiff | tree
2018-12-18 Clifford WolfMerge pull request #751 from daveshah1/fix_589 commit | commitdiff | tree
2018-12-18 David Shahmemory_dff: Fix typo when checking init value commit | commitdiff | tree
2018-12-18 Clifford WolfFix segfault in AST simplify commit | commitdiff | tree
2018-12-18 Icenowy Zhenganlogic: set the init value of DFFs commit | commitdiff | tree
2018-12-18 Icenowy ZhengAdd "dffinit -noreinit" parameter commit | commitdiff | tree
2018-12-18 Clifford WolfImprove src tagging (using names and attrs) of cells... commit | commitdiff | tree
2018-12-18 Icenowy ZhengAdd "dffinit -strinit high low" commit | commitdiff | tree
2018-12-18 Icenowy Zhenganlogic: fix dbits of Anlogic Eagle DRAM16X4 commit | commitdiff | tree
2018-12-17 makaimannAdd btor ops for $mul, $div, $mod and $concat commit | commitdiff | tree
2018-12-17 Clifford WolfMerge pull request #746 from Icenowy/anlogic-dram commit | commitdiff | tree
2018-12-17 Clifford WolfMerge pull request #742 from whitequark/changelog commit | commitdiff | tree
2018-12-17 Clifford WolfMerge pull request #741 from whitequark/ilang_slice_sigspec commit | commitdiff | tree
2018-12-17 Clifford WolfMerge pull request #744 from whitequark/write_verilog_... commit | commitdiff | tree
2018-12-17 Icenowy Zhenganlogic: add support for Eagle Distributed RAM commit | commitdiff | tree
2018-12-17 Icenowy ZhengRevert "Leave only real black box cells" commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #745 from YosysHQ/revert-714-abc_pre... commit | commitdiff | tree
2018-12-16 Clifford WolfRevert "Proof-of-concept: preserve naming through ABC... commit | commitdiff | tree
2018-12-16 whitequarkwrite_verilog: handle the $shift cell. commit | commitdiff | tree
2018-12-16 whitequarkUpdate CHANGELOG. commit | commitdiff | tree
2018-12-16 whitequarkread_ilang: allow slicing sigspecs. commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #736 from whitequark/select_assert_list commit | commitdiff | tree
2018-12-16 whitequarkselect: print selection if a -assert-* flag causes... commit | commitdiff | tree
2018-12-16 Clifford WolfRename "fine:" label to "map:" in "synth_ice40" commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #704 from webhat/feature/fix-awk commit | commitdiff | tree
2018-12-16 whitequarkwrite_verilog: add a missing newline. commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #738 from smunaut/issue_737 commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #735 from daveshah1/trifixes commit | commitdiff | tree
2018-12-16 Clifford WolfMerge pull request #739 from whitequark/patch-1 commit | commitdiff | tree
next