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gem5.git
2012-02-12
Ali Saidi
mem: Add a master ID to each request object.
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2012-02-12
Mrinmoy Ghosh
prefetcher: Make prefetcher a sim object instead of...
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2012-02-12
Nilay Vaish
Regressions: Update stats due to change in MESI protocol
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2012-02-11
Gabe Black
SPARC: Make PSTATE and HPSTATE a BitUnion.
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2012-02-10
Nilay Vaish
Ruby: Remove isTagPresent() calls from Sequencer.cc
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2012-02-10
Nilay Vaish
MESI: Add queues for stalled requests
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2012-02-10
Nilay Vaish
sim/system: initialize the pagePtr variable
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2012-02-10
Nilay Vaish
Regressions: Update stats due to O3 CPU changes
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2012-02-10
Nilay Vaish
O3 CPU: Improve handling of delayed commit flag
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2012-02-10
Nilay Vaish
O3 CPU: Strengthen condition for handling interrupts
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2012-02-10
Nilay Vaish
O3 CPU: Provide the squashing instruction
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2012-02-10
Nilay Vaish
O3 Fetch: Check if PC is pointing to Microcode ROM
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2012-02-10
Gabe Black
SE/FS: Record the system pointer all the time for the...
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2012-02-09
Andreas Hansson
MEM: Remove onRetryList from BusPort and rely on retryList
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2012-02-07
Gabe Black
Checker: Access workload element 0 only if there is...
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2012-02-07
Gabe Black
Faults: Turn off arch/faults.hh
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2012-02-07
Gabe Black
m5=>gem5: Make the regression script build gem5.* inste...
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2012-02-05
Gabe Black
X86: Rename the bridge which allows commnication back...
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2012-02-05
Gabe Black
Regressions: Fix the regress script when "all" is used.
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2012-02-03
Gabe Black
System: Forgot to qrefresh with my last change.
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2012-02-03
Gabe Black
System: Fix the check which detects running out of...
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2012-02-02
Andreas Hansson
Regression: Update the regress script after SE/FS merge
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2012-02-01
Ali Saidi
configs: More fixes for the memory system updates
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2012-02-01
Gabe Black
Merge ... head, hopefully the last time for this batch.
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2012-01-31
Koan-Sin Tan
clang: Enable compiling gem5 using clang 2.9 and 3.0
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2012-01-31
Andreas Hansson
MEM: Remove the otherPort from the cache ports
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2012-01-31
Andreas Hansson
Thread: Use inherited baseCpu rather than cpu in Simple...
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2012-01-31
Dam Sunwoo
util: implements "writefile" gem5 op to export file...
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2012-01-31
Geoffrey Blake
CheckerCPU: Re-factor CheckerCPU to be compatible with...
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2012-01-31
Gabe Black
Merge with main repository.
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2012-01-30
Andreas Hansson
Ruby: Connect system port in Ruby network test
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2012-01-30
Andreas Hansson
MEM: Make the RubyPort physMemPort a PioPort instead...
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2012-01-30
Andreas Hansson
MEM: Clean-up of Functional/Virtual/TranslatingPort...
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2012-01-29
Gabe Black
Yet another merge with the main repository.
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2012-01-29
Gabe Black
Implement Ali's review feedback.
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2012-01-29
Nilay Vaish
Config: Enable O3 CPU and Ruby in FS mode
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2012-01-29
Nilay Vaish
X86 Regressions: Update stats due to introduction of TSO
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2012-01-29
Nilay Vaish
O3 CPU LSQ: Implement TSO
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2012-01-28
Gabe Black
SE/FS: Get rid of the FULL_SYSTEM config option.
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2012-01-28
Gabe Black
SE/FS: Pull FULL_SYSTEM out of the build_opts files
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2012-01-28
Gabe Black
SE/FS: Get rid of FULL_SYSTEM in the configs directory
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2012-01-28
Gabe Black
SE/FS: Make both SE and FS tests available all the...
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2012-01-28
Gabe Black
SE/FS: Make SE vs. FS mode a runtime parameter.
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2012-01-28
Gabe Black
MIPS: Fix a compiler warning from the eret instruction.
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2012-01-28
Gabe Black
Merge with the main repo.
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2012-01-27
Andreas Hansson
ns_gige: Fix a missing curly brace in if-statement
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2012-01-26
Ronald Dreslinski
configs: actually add ARMv7a-like cpu/cache file
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2012-01-26
Ronald Dreslinski
configs: A more realistic configuration of an ARM-like...
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2012-01-25
Andreas Hansson
MEM: Fix fs.py by specifying the range size rather...
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2012-01-16
Gabe Black
Merge yet again with the main repository.
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2012-01-12
Mitchell Hayenga
Fix memory corruption issue with CopyStringOut()
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2012-01-25
Ali Saidi
stats: Update stats for final tick and memory bandwidth...
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2012-01-25
Ali Saidi
sim: display final value of curTick in stats
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2012-01-25
Ali Saidi
Mem: Add simple bandwidth stats to PhysicalMemory
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2012-01-23
Nilay Vaish
Config: Enable using O3 CPU and Ruby in SE mode
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2012-01-23
Nilay Vaish
O3, Ruby: Forward invalidations from Ruby to O3 CPU
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2012-01-23
Nilay Vaish
MemCmd: Add a command for invalidation requests to LSQ
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2012-01-17
Andreas Hansson
MEM: Make the bus default port yet another port
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2012-01-17
Andreas Hansson
MEM: Removing the default port peer from Python ports
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2012-01-17
Andreas Hansson
MEM: Make the bus bridge unidirectional and fixed addre...
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2012-01-17
William Wang
MEM: Remove the functional ports from the memory system
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2012-01-17
Andreas Hansson
MEM: Separate queries for snooping and address ranges
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2012-01-17
Andreas Hansson
MEM: Remove Port removeConn and MemObject deletePortRefs
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2012-01-17
Andreas Hansson
MEM: Remove the notion of the default port
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2012-01-17
Andreas Hansson
MEM: Simplify ports by removing EventManager
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2012-01-17
Andreas Hansson
CPU: Moving towards a more general port across CPU...
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2012-01-17
Andreas Hansson
MEM: Add port proxies instead of non-structural ports
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2012-01-17
Andreas Hansson
Ruby: Change the access permissions for MOESI hammer
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2012-01-17
Andreas Hansson
Ruby: Change the access permissions for MOESI hammer
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2012-01-17
Andreas Hansson
MEM: Add the system port as a central access point
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2012-01-17
Andreas Hansson
MEM: Differentiate functional cache accesses from CPU...
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2012-01-17
Ali Saidi
stats: undo parser change from initparam change
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2012-01-17
Steve Reinhardt
Alpha: warn_once about broken PAL breakpoints.
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2012-01-17
Steve Reinhardt
debug: fix AllFlags::disable()
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2012-01-12
Maximilien...
inorder: MDU deadlock fix
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2012-01-12
Deyuan Guo
mips: compatibility between MIPS_SE and cross compiler...
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2012-01-12
Deyuan Guo
mips: Fix bugs in faults.cc/hh and tlb.cc for MIPS_FS
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2012-01-12
Deyuan Guo
mips: Fix decoder of two float-convert instructions
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2012-01-12
Deyuan Guo
mips: definition of MIPS64_QNAN in registers.hh
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2012-01-12
Nilay Vaish
PerfectCacheMemory: Remove references to CacheMsg
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2012-01-12
Ali Saidi
Packet: Put back part of the assert
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2012-01-12
Ali Saidi
Packet: Remove meaningless assert statement
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2012-01-11
Nilay Vaish
Ruby: Use map option for selecting b/w sparse and memor...
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2012-01-11
Nilay Vaish
Config: Add support for restoring using a timing CPU
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2012-01-11
Nilay Vaish
Ruby: Resurrect Cache Warmup Capability
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2012-01-11
Nilay Vaish
Ruby Debug Flags: Remove one, add another
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2012-01-11
Nilay Vaish
Ruby Port: Add a list of cpu ports attached to this...
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2012-01-11
Nilay Vaish
Ruby EventQueue: Remove unused functions
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2012-01-11
Nilay Vaish
Ruby Sparse Memory: Add function for collating blocks
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2012-01-11
Nilay Vaish
Ruby: Add infrastructure for recording cache contents
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2012-01-11
Nilay Vaish
Ruby Memory Vector: Functions for collating and populat...
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2012-01-11
Nilay Vaish
Ruby: remove the files related to the tracer
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2012-01-11
Nathan Binkert
hgfilesize: skip files that have been removed
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2012-01-10
Nilay Vaish
MOESI Hammer: Update regression test output
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2012-01-10
Nilay Vaish
MOESI Hammer: Remove a couple of bugs
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2012-01-10
Nilay Vaish
Sparse Memory: Simplify the structure for an entry
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2012-01-10
Ali Saidi
Automated merge with ssh://repo.gem5.org/gem5
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2012-01-10
Ali Saidi
config: Fix json output for Python lt 2.6.
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2012-01-10
Nilay Vaish
DPRINTF: Improve some dprintf messages.
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2012-01-10
Nilay Vaish
X86 Regressions: Update stats due to fence instruction
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