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gem5.git
2019-09-09 Giacomo Travaglinidev-arm: Cleanup GICv3 initialization commit | commitdiff | tree
2019-09-09 Giacomo Travaglinidev-arm: Initialize GICD_TYPER once at construction... commit | commitdiff | tree
2019-09-09 Giacomo Travaglinidev-arm: Writes to IGRPEN1_EL3 triggering update commit | commitdiff | tree
2019-09-09 Giacomo Travaglinidev-arm: Fix GICv3 ITS cmdq wrapping commit | commitdiff | tree
2019-09-09 Giacomo Travaglinidev-arm: Fix mapping between IGRPEN1_EL3 and IGRPEN1_EL1 commit | commitdiff | tree
2019-09-09 Giacomo Travaglinidev-arm: Implement message-based SPIs commit | commitdiff | tree
2019-09-09 Gabe Blackdev: Scrub out some lingering uses of MemObject. commit | commitdiff | tree
2019-09-07 Giacomo Travaglinidev-arm: Add GICD_SGIR register commit | commitdiff | tree
2019-09-07 Gabe Blackpython: Make the dot writer handle unconnected Port... commit | commitdiff | tree
2019-09-06 Giacomo Travaglinidev: Enable Terminal output's dump to stdout commit | commitdiff | tree
2019-09-06 Giacomo Travaglinidev-arm: State update when setting MISCREG_ICC_IGRPENx... commit | commitdiff | tree
2019-09-06 Giacomo Travagliniarch-arm, dev-arm: MISCREG_ICC_IGRPEN1_EL1 using AA64... commit | commitdiff | tree
2019-09-06 Giacomo Travagliniarch-arm, dev-arm: MISCREG_ICC_AP1R0_EL1 using AA64... commit | commitdiff | tree
2019-09-06 Giacomo Travagliniarch-arm, dev-arm: MISCREG_ICC_CTLR_EL1 using AA64... commit | commitdiff | tree
2019-09-06 Giacomo Travagliniarch-arm: MISCREG_ICC_BPR1_EL1 using AA64 banking commit | commitdiff | tree
2019-09-06 Giacomo Travaglinidev-arm: Add read/writeBanked helpers to GICv3 commit | commitdiff | tree
2019-09-06 Giacomo Travagliniarch-arm: Add explicit AArch64 MiscReg banking commit | commitdiff | tree
2019-09-06 Giacomo Travagliniarch-arm: Use same template across all MSR inst commit | commitdiff | tree
2019-09-06 Giacomo Travagliniarch-arm: SySDC64 Instructions (CMO) using MiscRegIndex commit | commitdiff | tree
2019-09-06 Chun-Chen TK Hsudev: Fix segmentation fault in VirtIOBlock commit | commitdiff | tree
2019-09-06 Ciro Santilliarch-arm: fix GDB stub after SVE commit | commitdiff | tree
2019-09-06 Giacomo Travaglinidev-arm: Rewrite ICC_BPR0/ICC_BPR1 handling commit | commitdiff | tree
2019-09-06 Giacomo Travaglinidev-arm: Add GICv3 unimplemented Hyp Active Priorities... commit | commitdiff | tree
2019-09-06 Giacomo Travaglinidev-arm: Allow 32-bit access to GITS_TYPER commit | commitdiff | tree
2019-09-06 Giacomo Travaglinidev-arm: Cpu interface groupEnabled check for global... commit | commitdiff | tree
2019-09-06 Giacomo Travaglinidev-arm: Check if INTID group is enabled when reading... commit | commitdiff | tree
2019-09-06 Giacomo Travaglinidev-arm: Writing GICD_CTLR should trigger an update commit | commitdiff | tree
2019-09-06 Giacomo Travaglinidev-arm: Rewrite GICv3 update commit | commitdiff | tree
2019-09-06 Giacomo Travaglinidev-arm: Fix GICv3 IGRPMOD writes commit | commitdiff | tree
2019-09-06 Giacomo Travagliniarch-arm: SGI registers undecoded in AArch32 commit | commitdiff | tree
2019-09-06 Giacomo Travagliniarch-arm: Fix read/setMiscReg for AArch32 GICv3 ICC... commit | commitdiff | tree
2019-09-06 Giacomo Travaglinidev-arm: Fix SGI generation commit | commitdiff | tree
2019-09-06 Adrian Herreradev-arm: Gicv3 ITS device tree autogen commit | commitdiff | tree
2019-09-06 Adrian Herreradev-arm: modify GICv3 ITS default addr commit | commitdiff | tree
2019-09-05 Pouya Fotouhiarch-x86: Adding warning for movnti commit | commitdiff | tree
2019-09-05 Giacomo Travaglinidev-arm: Improper translation slot release in SMMUv3 commit | commitdiff | tree
2019-09-05 Jan-Peter Larssondev-arm: Implement invalidateASID in SMMUv3 WalkCache commit | commitdiff | tree
2019-09-05 Adrian Herreradev-arm: Implement invalidateVA/VAA in SMMUv3 WalkCache commit | commitdiff | tree
2019-09-05 Pouya Fotouhiarch-x86: implement movntq/movntdq instructions commit | commitdiff | tree
2019-09-04 Ciro Santillicpu: reset byte_enable across writeMem calls commit | commitdiff | tree
2019-09-04 Gabe Blackdev: Templatize PioPort. commit | commitdiff | tree
2019-09-03 Srikant Bharadwajruby: Fix the way stall map size is checked for availab... commit | commitdiff | tree
2019-09-03 Daniel R. Carvalhoconfigs: Fix replacement policy assignment commit | commitdiff | tree
2019-09-02 Andreas Sandbergstats: Create HDF5 stat files relative to simout commit | commitdiff | tree
2019-09-02 Doğukan Korkmaztürkstats: Catch exceptions by const reference commit | commitdiff | tree
2019-09-02 Andreas Sandbergstats: Add support for listing available formats commit | commitdiff | tree
2019-08-30 Giacomo Travagliniarm,kvm: Fix python imports from global namespace commit | commitdiff | tree
2019-08-29 Daniel R. Carvalhomem-cache: Use SatCounter for RRPV commit | commitdiff | tree
2019-08-29 Daniel R. Carvalhobase: Add function to saturate SatCounter commit | commitdiff | tree
2019-08-29 Andreas Sandbergstats: Add beta support for HDF5 stat dumps commit | commitdiff | tree
2019-08-29 Andreas Sandbergmem: Convert CommMonitor to the new stat framework commit | commitdiff | tree
2019-08-29 Andreas Sandbergcpu: Convert traffic gen to use new stats commit | commitdiff | tree
2019-08-29 Andreas Sandbergstats: Add support for partial stat dumps commit | commitdiff | tree
2019-08-29 Andreas Sandbergstats: Add support for hierarchical stats commit | commitdiff | tree
2019-08-28 Daniel R. Carvalhomem-ruby: Define BloomFilter namespace commit | commitdiff | tree
2019-08-28 Daniel R. Carvalhomem-ruby: Make H3 inherit from MultiBitSelBloomFilter commit | commitdiff | tree
2019-08-28 Daniel R. Carvalhomem-ruby: Finish implementing BloomFilter merge commit | commitdiff | tree
2019-08-28 Daniel R. Carvalhomem-ruby: Remove NonCountingBloomFilter commit | commitdiff | tree
2019-08-28 Daniel R. Carvalhomem-ruby: Make MultiGrainBloomFilter generic commit | commitdiff | tree
2019-08-28 Daniel R. Carvalhomem-ruby: Parameterize xor bits in BlockBloomFilter commit | commitdiff | tree
2019-08-28 Gabe Blackcpu: Make get(Data|Inst)Port return a Port and not... commit | commitdiff | tree
2019-08-28 Gabe Blackcpu, mem: Add new getSendFunctional method to the base... commit | commitdiff | tree
2019-08-28 Gabe Blackmem: Make PortProxy use a delegate for a sendFunctional... commit | commitdiff | tree
2019-08-28 Gabe Blackcpu: Move the instruction port into o3's fetch stage. commit | commitdiff | tree
2019-08-28 Gabe Blackcpu: Move O3's data port into the LSQ. commit | commitdiff | tree
2019-08-28 Gabe Blackmem: Eliminate the Base(Slave|Master)Port classes. commit | commitdiff | tree
2019-08-27 Gabe Blackcpu, dev, mem: Use the new Port methods. commit | commitdiff | tree
2019-08-27 Gabe Blacksim: Add a << overload for the Port class which prints... commit | commitdiff | tree
2019-08-27 Gabe Blacksim: Add a takeOverFrom method to the base Port class. commit | commitdiff | tree
2019-08-27 Gabe Blackmem, sim, systemc: Reorganize Port and co.s bind, unbin... commit | commitdiff | tree
2019-08-26 Giacomo Travaglinidev-arm: Fix GICv3 ITS indexing error commit | commitdiff | tree
2019-08-26 Giacomo Travaglinidev-arm: Fix GITS_BASER initialization/access commit | commitdiff | tree
2019-08-23 Alec Roelkearch-riscv: fix GDB register cache commit | commitdiff | tree
2019-08-23 Gabe Blackmem: Put gem5 protocols in their own directory. commit | commitdiff | tree
2019-08-23 Gabe Blackmem: Move ruby protocols into a directory called ruby_p... commit | commitdiff | tree
2019-08-23 Gabe Blackmem: Split the various protocols out of the gem5 master... commit | commitdiff | tree
2019-08-22 Ciro Santillimem-ruby: fix build with PROTOCOL=MOESI_hammer commit | commitdiff | tree
2019-08-22 Giacomo Travaglinidev-arm: Start using GITS_CTLR.quiescent bit commit | commitdiff | tree
2019-08-22 Giacomo Travaglinidev-arm: Allow 32 bit accesses to GITS_C(WRITER/READR... commit | commitdiff | tree
2019-08-22 Adrian Herreradev-arm,system-arm: missing GICv3 ranges property commit | commitdiff | tree
2019-08-21 Adrian Herreraconfigs: root, platform options in fs bigLITTLE commit | commitdiff | tree
2019-08-21 Yifei Liuarch-riscv: Update register file commit | commitdiff | tree
2019-08-21 Ciro Santilliarch-arm, cpu: fix ARM ubsan build on GCC 7.4.0 commit | commitdiff | tree
2019-08-21 Ciro Santillibase: assert that stats bucket size is greater than 0 commit | commitdiff | tree
2019-08-21 Chun-Chen TK Hsuarch-arm: Fix implicit fallthrough build errors commit | commitdiff | tree
2019-08-20 Giacomo Travaglinidev-arm: Add redistributor-stride property to GICv3 commit | commitdiff | tree
2019-08-20 Giacomo Travagliniarch-arm: Replace occ of opModeToEL(currOpMode/cpsr... commit | commitdiff | tree
2019-08-20 Giacomo Travagliniarch-arm: Replace direct use cpsr.el with currEL helper commit | commitdiff | tree
2019-08-20 Giacomo Travagliniarch-arm: Overload currEL helper with CPSR argument commit | commitdiff | tree
2019-08-20 Giacomo Travagliniarch-arm: Rewrite the currEL helper method to use opMod... commit | commitdiff | tree
2019-08-20 Giacomo Travaglinidev-arm: Add GITS_PIDR2 register to the ITS memory map commit | commitdiff | tree
2019-08-20 Giacomo Travaglinidev-arm: Add Gicv3Distributor members for GICv3 GICD_PIDRx commit | commitdiff | tree
2019-08-19 Pablo Prietomem-ruby, arch-hsail: Removed hit latency from VIPERCoa... commit | commitdiff | tree
2019-08-16 Gabe Blackx86: Stop CPUID from claiming we support xsave. commit | commitdiff | tree
2019-08-15 Gabe Blackx86: Make unsuccessful CPUID instructions zero the... commit | commitdiff | tree
2019-08-13 Gabe Blacksim: Add a hook Clocked objects can implement for frequ... commit | commitdiff | tree
2019-08-13 Gabe Blacksim: Clean up some mild style bugs in clocked_object.hh. commit | commitdiff | tree
2019-08-13 Pouya Fotouhimem-ruby: Use check_on_cache_probe on MI commit | commitdiff | tree
2019-08-13 Pouya Fotouhimem-ruby: Use check_on_cache_probe on MOESI hammer commit | commitdiff | tree
2019-08-13 Pouya Fotouhimem-ruby: Use check_on_cache_probe on MOESI CMP commit | commitdiff | tree
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