yosys.git
2019-08-21 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_...
2019-08-21 Eddie HungOutput "h" extension only if boxes
2019-08-21 Eddie HungRevert "Fix omode which inserts an output if none exist...
2019-08-21 Eddie HungAdd abc_arrival to SRL*
2019-08-21 Eddie HungFix omode which inserts an output if none exists (other...
2019-08-21 Eddie HungRevert "Only xaig if GetSize(output_bits) > 0"
2019-08-21 Eddie HungOnly xaig if GetSize(output_bits) > 0
2019-08-21 Eddie HungMissing newline
2019-08-21 Eddie HungFix copy-paste typo
2019-08-21 Eddie HungOops
2019-08-21 Eddie HungMerge branch 'eddie/fix_techmap' into xaig_arrival
2019-08-21 Eddie HungGrammar
2019-08-21 Eddie HungAdd test
2019-08-21 Eddie Hungtechmap -max_iter to apply to each module individually
2019-08-21 Eddie Hungtechmap -max_iter to apply to each module individually
2019-08-21 Eddie Hungxilinx to use abc_map.v with -max_iter 1
2019-08-21 Eddie Hungecp5: remove DPR16X4 from abc_unmap.v
2019-08-21 Eddie Hungecp5 to use -max_iter 1
2019-08-21 Eddie Hungecp5 to use abc_map.v and _unmap.v
2019-08-21 Eddie HungAdd (* abc_arrival=<int> *) doc
2019-08-21 Eddie HungAdd reference to FD* timing
2019-08-21 Eddie HungRemove sequential extension
2019-08-21 Eddie HungRemove SRL* delays from cells_sim.v
2019-08-21 Eddie Hungretime_mode -> dff_mode
2019-08-21 Eddie HungLUTMUX -> LUTMUX6
2019-08-21 Eddie HungCleanup techmap in map_luts
2019-08-21 Eddie HungMove `techmap abc_map.v` into map_luts
2019-08-21 Eddie HungRemove delays from abc_map.v
2019-08-21 Eddie HungTypo
2019-08-21 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-08-20 Eddie HungDo not sigmap!
2019-08-20 Eddie HungDeprecate `abc_scc_break` attribute
2019-08-20 Eddie HungWrap SRL{16,32} too
2019-08-20 Eddie HungWrap LUTRAMs in order to capture comb/seq behaviour
2019-08-20 Eddie HungMinor refactor
2019-08-20 Eddie HungAdd LUTRAM delays
2019-08-20 Eddie HungFix use of {CLK,EN}_POLARITY, also add a FIXME
2019-08-20 Eddie HungRemove mapping rules
2019-08-20 Eddie HungMerge pull request #1209 from YosysHQ/eddie/synth_xilinx
2019-08-20 Eddie HungRemove -icells
2019-08-20 Eddie HungUse abc_{map,unmap,model}.v
2019-08-20 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-08-20 Eddie HungMerge pull request #1304 from YosysHQ/eddie/abc9_refactor
2019-08-20 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-08-20 Clifford WolfMerge pull request #1298 from YosysHQ/clifford/pmgen
2019-08-20 Clifford WolfMerge branch 'master' into clifford/pmgen
2019-08-20 Clifford WolfAdd test case for real parameters
2019-08-20 Clifford WolfMerge pull request #1308 from jakobwenzel/real_params
2019-08-20 whitequarkMerge pull request #1309 from whitequark/proc_clean...
2019-08-19 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-08-19 Eddie HungAdd arrival times for SRL outputs
2019-08-19 Eddie HungOutput i/o/h extensions even if no boxes or flops
2019-08-19 Eddie HungAdd BRAM arrival times
2019-08-19 Eddie HungRemove debug
2019-08-19 Eddie HungAdd reference to source of Tclktoq timing
2019-08-19 Eddie HungAdd (* abc_arrival *) attribute
2019-08-19 Eddie Hung Add 'abc_arrival' attribute for flop outputs
2019-08-19 Eddie HungUpdate box timings
2019-08-19 Eddie HungMove from cell attr to module attr
2019-08-19 Eddie HungFix typo
2019-08-19 Eddie HungFix typo
2019-08-19 Eddie HungID({A,B,Y}) -> ID::{A,B,Y} for opt_share.cc
2019-08-19 Eddie HungMerge remote-tracking branch 'origin/master' into xaig_dff
2019-08-19 Eddie HungClarify with 'only'
2019-08-19 Eddie HungUpdate doc
2019-08-19 Eddie HungUnify abc_carry_{in,out} into abc_carry and use port...
2019-08-19 Eddie HungUse attributes instead of params
2019-08-19 whitequarkproc_clean: fix order of switch insertion.
2019-08-19 Eddie HungSet abc_flop and use it in toposort
2019-08-19 Eddie HungUse %d
2019-08-19 Jakob Wenzelhandle real values when deriving ast modules
2019-08-19 Clifford WolfMerge pull request #1306 from mmicko/gitignore_fix
2019-08-19 Clifford WolfAdd *.sv to tests/simple_abc9/.gitignore
2019-08-19 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys into...
2019-08-19 Clifford WolfMerge pull request #1305 from YosysHQ/clifford/testfast
2019-08-19 Eddie HungMerge remote-tracking branch 'origin/master' into cliff...
2019-08-19 Eddie HungRemoval of more `stat` calls from tests
2019-08-18 Miodrag MilanovicIgnore all generated headers for pmgen pass
2019-08-18 whitequarkMerge pull request #1290 from YosysHQ/eddie/pr1266_again
2019-08-18 whitequarkMerge branch 'master' into eddie/pr1266_again
2019-08-17 Clifford WolfMerge pull request #1283 from YosysHQ/clifford/fix1255
2019-08-17 Clifford WolfMerge pull request #1303 from YosysHQ/bogdanvuk/opt_share
2019-08-17 Clifford WolfMerge pull request #1300 from YosysHQ/eddie/cleanup2
2019-08-17 Clifford WolfFix erroneous ifndef-NDEBUG in verific.cc
2019-08-17 Clifford WolfSpeed up "make test" and related cleanups
2019-08-17 Clifford WolfAdd test for pmtest_test "reduce" demo pattern
2019-08-17 Clifford WolfRefactor pmgen rollback mechanism
2019-08-17 Clifford WolfImprovements in "test_pmgen -generate"
2019-08-17 Clifford WolfAdd pmgen "fallthrough" statement
2019-08-16 Eddie HungMerge branch 'eddie/abc9_refactor' into xaig_dff
2019-08-16 Eddie HungUse ID()
2019-08-16 Eddie HungAdd doc for abc_* attributes
2019-08-16 Eddie HungUpdate abc_* attr in ecp5 and ice40
2019-08-16 Eddie HungCompute abc_scc_break and move CI/CO outside of each...
2019-08-16 Eddie HungAttach abc_scc_break, abc_carry_{in,out} attr to ports...
2019-08-16 Eddie HungMerge pull request #1250 from bwidawsk/master
2019-08-16 Eddie HungUse ID() macro
2019-08-16 Eddie HungAdd 'opt_share' to CHANGELOG
2019-08-16 Eddie HungAdd 'opt_share' to 'opt -full'
2019-08-16 Eddie HungMerge https://github.com/bogdanvuk/yosys into bogdanvuk...
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