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gem5.git
2014-01-24
Ali Saidi
cpu: Add support for instructions that zero cache lines.
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2014-01-24
Ali Saidi
cpu: Add CPU support for generatig wake up events when...
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2014-01-24
Giacomo Gabrielli
mem: Add flag to request if it was generated by a...
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2014-01-24
Giacomo Gabrielli
mem: Add support for a security bit in the memory system
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2014-01-24
Chris Adeniyi...
sim: Add openat/fstatat syscalls and fix mremap
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2014-01-24
Ali Saidi
mem: Remove explict cast from memhelper.
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2014-01-24
Timothy M....
Cache: Collect very basic stats on tag and data accesses
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2014-01-24
Dam Sunwoo
mem: per-thread cache occupancy and per-block ages
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2014-01-24
Matt Horsnell
base: add support for probe points and common probes
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2014-01-24
Andreas Hansson
sim: Expose the current voltage for each object as...
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2014-01-24
Andreas Hansson
sim: Expose the current clock period as a stat
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2014-01-24
Matt Horsnell
mem: track per-request latencies and access depths...
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2014-01-24
Andreas Hansson
config: Make the Clock a Tick parameter like Latency...
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2014-01-24
Andreas Hansson
x86: Fix memory leak in table walker
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2014-01-24
Andreas Hansson
cpu: Relax check on squashed non-speculative instructions
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2014-01-24
Dam Sunwoo
util: updated Streamline flow to support ARM DS-5 v5...
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2014-01-24
Dam Sunwoo
cpu: remove faulty simpoint basic block inst count...
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2014-01-17
Nilay Vaish
ruby: remove unused label no_vector
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2014-01-10
Nilay Vaish
stats: updates due to changes to ruby
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2014-01-10
Nilay Vaish
ruby: move all statistics to stats.txt, eliminate ruby...
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2014-01-10
Nilay Vaish
stats: add function for adding two histograms
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2014-01-09
Nilay Vaish
ruby: fix bug introduced to revision 8523754f8885
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2014-01-08
Nilay Vaish
ruby: slicc: remove variable 'addr' used in calls to...
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2014-01-04
Nilay Vaish
ruby: add a three level MESI protocol.
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2014-01-04
Nilay Vaish
ruby: rename MESI_CMP_directory to MESI_Two_Level
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2014-01-04
Nilay Vaish
ruby: remove cntrl_id from python config scripts.
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2014-01-04
Nilay Vaish
ruby: add support for clusters
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2014-01-04
Nilay Vaish
ruby: some small changes
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2014-01-04
Steve Reinhardt
config, x86: move kernel specification from tests to...
stable_2014_02_15
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2014-01-04
Steve Reinhardt
python: provide better error message for wrapped C...
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2014-01-04
Steve Reinhardt
python: don't die on assignment to cloned object
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2013-12-30
Christopher...
sim: Add support for dynamic frequency scaling
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2013-12-30
Christopher...
mips: Floating point convert bug fix
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2013-12-26
Nilay Vaish
stats: updates due to bug fixed in mesi coherence protocol
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2013-12-26
Nilay Vaish
ruby: fix bugs in mesi cmp directory protocol
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2013-12-21
Nilay Vaish
ruby: slicc: replace max_in_port_rank with number of...
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2013-12-21
Nilay Vaish
ruby: declare variables to be unsigned in Address.hh
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2013-12-21
Nilay Vaish
ruby: mesi: remove owner and sharer fields from directo...
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2013-12-03
Nilay Vaish
sim: reset stats after startup
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2013-12-03
Nilay Vaish
cpu: call BaseCPU startup() function in o3 cpu
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2013-12-03
Nilay Vaish
util: update checkpoint aggregation script
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2013-11-29
Andreas Sandberg
base: Fix race in PollQueue and remove SIGALRM workaround
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2013-11-29
Andreas Sandberg
base: Clean up signal handling
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2013-11-26
Nilay Vaish
stats: updates due to changes to ticksToCycles()
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2013-11-26
Nilay Vaish
sim: correct ticksToCycles() function.
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2013-10-15
Andreas Sandberg
kvm: Set the perf exclude_host attribute if available
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2013-11-26
Christian Menard
x86: Implementation of Int3 and Int_Ib in long mode
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2013-11-26
Andreas Sandberg
kvm: Remove the unused hostFreq member from BaseKvmCPU
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2013-11-25
Steve Reinhardt...
sim: simulate with multiple threads and event queues
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2013-11-15
Anthony Gutierrez
cpu: allow the fetch buffer to be smaller than a cache...
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2013-11-15
Andreas Hansson
cpu: Fix Checker register index use
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2013-11-14
Steve Reinhardt
tests: suppress output on switcheroo tests
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2013-11-12
Anthony Gutierrez
sim: fix event priority name for debug-start option
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2013-11-01
Andreas Hansson
stats: Bump stats to match DRAM controller changes
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2013-11-01
Andreas Hansson
mem: Fixes for DRAM stats accounting
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2013-11-01
Andreas Hansson
mem: Fix the LPDDR3 page size
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2013-11-01
Neha Agarwal
mem: Adding stats for DRAM power calculation
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2013-11-01
Neha Agarwal
mem: Unify request selection for read and write queues
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2013-11-01
Andreas Hansson
mem: Add a simple adaptive version of the open-page...
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2013-11-01
Neha Agarwal
mem: Just-in-time write scheduling in DRAM controller
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2013-11-01
Andreas Hansson
mem: Add tRRD as a timing parameter for the DRAM controller
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2013-11-01
Andreas Hansson
mem: Less conservative tRAS in DRAM configurations
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2013-11-01
Ani Udipi
mem: Make tXAW enforcement less conservative and per...
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2013-11-01
Neha Agarwal
mem: Fix for 100% write threshold in DRAM controller
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2013-11-01
Andreas Hansson
mem: Pick the next DRAM request based on bank availability
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2013-11-01
Ani Udipi
mem: Use the same timing calculation for DRAM read...
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2013-11-01
Ani Udipi
mem: Fix DRAM bank occupancy for streaming access
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2013-11-01
Ani Udipi
mem: Schedule time for DRAM event taking tRAS into...
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2013-11-01
Ani Udipi
mem: Add tRAS parameter to the DRAM controller model
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2013-11-01
Andreas Hansson
stats: Bump stats after shifting to SimpleMemory
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2013-11-01
Andreas Hansson
test: Use SimpleMemory for atomic full-system tests
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2013-11-01
Andreas Hansson
sim: Clarify the difference between tracing and debugging
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2013-10-31
Chander Sudanthi
ARM: add support for TEEHBR access
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2013-10-31
Matt Evans
dev: Add 'OSC' oscillator sys control reg support to...
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2013-10-31
Geoffrey Blake
dev: Add support for MSI-X and Capability Lists for...
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2013-10-31
Geoffrey Blake
dev: Fix race conditions in IDE device on newer kernels
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2013-10-31
Geoffrey Blake
base: Add support for ipv6 into inet.hh/inet.cc
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2013-10-31
Faissal Sleiman
cpu: Construct ROB with cpu params struct instead of...
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2013-10-31
Geoffrey Blake
config: Fix handling of parents for simobject vectors
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2013-10-31
Dam Sunwoo
sim: added option to serialize SimLoopExitEvent
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2013-10-31
Stephan Diestelhorst
mem: Add "const" attribute to Packet getters
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2013-10-31
Prakash Ramrakhyani
mem: Add privilege info to request class
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2013-10-31
Ali Saidi
arm: fix m5ops binary for ARM and add m5fail.
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2013-10-31
Ali Saidi
cpu: Fix O3 issuse with load+barrier instructions.
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2013-10-30
Lluc Alvarez
ruby: set SenderMachine in messages of MOESI_CMP_directory
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2013-10-30
Emilio Castillo
ruby: Fixed a deadlock when restoring a checkpoint...
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2013-10-17
Stephan Diestelhorst
mem: De-virtualise interfaces in the CoherentBus
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2013-10-17
Matt Horsnell
cpu: add consistent guarding to *_impl.hh files.
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2013-10-17
Sascha Bischoff
mem: Add PortID to QueuedMasterPort constructor
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2013-10-17
Matt Evans
arm: Add a 'clear PPI' method to gic_pl390
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2013-10-17
Geoffrey Blake
config: Fix ommission of number base in ethernet addres...
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2013-10-17
Geoffrey Blake
config: Fix for port references generated multiple...
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2013-10-17
Dam Sunwoo
dev: Add option to disable framebuffer .bmp dump in...
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2013-10-17
Faissal Sleiman
cpu: Removing an unused variable in rename
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2013-10-17
Faissal Sleiman
cpu: Change IEW DPRINTF to use IEW debug flag
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2013-10-17
Faissal Sleiman
cpu: Put in assertions to check for maximum supported...
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2013-10-17
Dam Sunwoo
util: Streamline .apc project convertsion script
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2013-10-17
Eric Van Hensbergen
arm: Accomodate function name changes in newer linux...
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2013-10-17
Ali Saidi
arm: Fix a GIC mask register bug
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2013-10-17
Ali Saidi
cpu: Fix O3 uncacheable load that is replayed but misse...
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