openpower-isa.git
2023-05-09 Jacob Lifshayaccess XER via fields
2023-05-09 Jacob Lifshayaccess FPSCR through self
2023-05-09 Jacob LifshaySetFX is not a normal function -- it can assign to...
2023-05-09 Jacob Lifshayswitch fpcvt over to using FPSCR attributes
2023-05-09 Jacob Lifshayadd parser support for attributes like FPSCR.RN
2023-05-09 Jacob Lifshaymove apply_trailer into parser class
2023-05-09 Jacob Lifshaybypass ply's eating SyntaxErrors
2023-05-09 Jacob LifshayFPSCR.FPRF can be assigned strings
2023-05-09 Jacob Lifshayadd XERState since XER has fields too
2023-05-09 Jacob Lifshayfix some broken FieldSelectableInt handling
2023-05-07 Luke Kenneth... comment TODO on Load-Fault in strncpy example
2023-05-07 Luke Kenneth... add stub reset_xflags function
2023-05-07 Dmitry Selyutinminor_19.csv: convert RA to RA0 for minmax
2023-05-06 Luke Kenneth... add FPSCR to Test API (ExpectedState, SimState). untested
2023-05-06 Luke Kenneth... add FPSCR to ISACaller
2023-05-06 Luke Kenneth... notes: make FPSCR definition more like MSR (see openpow...
2023-05-06 Luke Kenneth... drastically simplify fpscr.py. extreme overcomplexity...
2023-05-06 Luke Kenneth... add comment about why the new check has been added
2023-05-06 Luke Kenneth... get table down to under 80 chars per line
2023-05-06 Jacob Lifshayfix fpscr table parser error reporting
2023-05-06 Jacob Lifshayadd FPSCRState and FPSCRRecord and a FPSCR smoke-test
2023-05-05 Jacob Lifshayadd initial fmv/fcvt tests, though they're broken due...
2023-05-05 Jacob Lifshayadd check that generated .py files are in .gitignore
2023-05-05 Jacob Lifshayverify fields.txt forms' field separators ('|') line...
2023-05-04 Konstantinos... merge maddrs/msubrs, unit tests changed accordingly
2023-05-04 Konstantinos... Add 2 more instructions to help with 2-coeff butterfly
2023-05-04 Konstantinos... use a simpler way to do the same thing
2023-05-04 Konstantinos... Handle large 64-bit values, but only the low 64-bit...
2023-05-04 Konstantinos... do proper rounding, no rounding for SH=0 (for now)...
2023-05-04 Konstantinos... Result needs rounding so add +1 to prod*
2023-05-04 Konstantinos... handle negatives correctly by adding sign bit to final...
2023-05-04 Konstantinos... almost there, positive values work, negative values...
2023-05-04 Konstantinos... use proper register sizes
2023-05-04 Konstantinos... MULS instead of MUL, RA instead of RT in in1
2023-05-04 Konstantinos... Turns out DCTI-Form is another variant of A-Form
2023-05-04 Konstantinos... minor fixes in pseudocode, CONST_UI->CONST_SH in minor_...
2023-05-04 Konstantinos... WIP: maddsubrs initial approach
2023-05-04 Luke Kenneth... maddsubrs no longer has CR0
2023-05-04 Jacob Lifshayfix forgotten stuff from last commit
2023-05-04 Jacob Lifshayadd fcvt/fmv -- no tests yet
2023-05-04 Jacob Lifshaysupport calling functions with no args in pseudocode
2023-05-04 Jacob Lifshayshow actual mdwn source location in backtrace when...
2023-05-04 Jacob Lifshaymove Assign to parser class in prep for improving synta...
2023-05-04 Jacob Lifshayadd all fmv*/fcvt* fields
2023-05-04 Jacob Lifshaysplit XO-Form's RA field in prep for adding fcvttg...
2023-05-04 Jacob Lifshayremove testing with INSNDB=true since that now does...
2023-05-04 Jacob Lifshaycomment fmin*/fmax* since they're being replaced with...
2023-05-04 Jacob Lifshayfix non-zero assembly operands being zero
2023-05-04 Jacob Lifshayupdate SV csvs
2023-05-02 Luke Kenneth... add links between decode and issue
2023-05-02 Luke Kenneth... reserve writes in Issue Phase, add comment
2023-05-02 Luke Kenneth... add Issue phase and writes/reads possible in CPU
2023-05-02 Luke Kenneth... add Decode and CPU classes
2023-05-02 Luke Kenneth... add quick preamble header
2023-05-02 Luke Kenneth... update comments and correct retiring, remove registers...
2023-05-02 Luke Kenneth... start on cycle-accurate model of inorder core
2023-04-30 Luke Kenneth... ffnmadds converted to 3-operand
2023-04-30 Luke Kenneth... converted ffnmadds to 3-operand
2023-04-30 Luke Kenneth... ffmsubs number of operands reduced to match ffmadds
2023-04-30 Dmitry Selyutinpower_insn: forbid zero for non-zero operands
2023-04-30 Dmitry Selyutinpower_insn: drop registers remapping hack
2023-04-30 Dmitry Selyutinpower_insn: support int and index opcode methods
2023-04-28 Luke Kenneth... reduce number of operands to ffmadds as well
2023-04-28 Jacob Lifshayprefix-sum remap works!
2023-04-28 Jacob Lifshaychange order to tuple in remap preduce tests/demos...
2023-04-28 Jacob Lifshayfix <u and >u with int arguments
2023-04-28 Luke Kenneth... reduce fdmadds down to only 3 operands, RT-overwrite...
2023-04-27 Luke Kenneth... add SVSHAPE setup for parallel/prefix but it refuses...
2023-04-27 Luke Kenneth... add implicit rs detection for maddsubrs
2023-04-27 Luke Kenneth... link in new parallel-prefix REMAP schedule
2023-04-27 Jacob Lifshayadd scan/prefix-sum support to copy of parallel-reduce...
2023-04-27 Jacob Lifshayformat remap_preduce_yield.py
2023-04-26 Dmitry Selyutinpower_insn: deprecate ff/pr common code nopr
2023-04-26 Dmitry Selyutinpower_insn: deprecate PR specifier
2023-04-26 Dmitry Selyutinpower_insn: deprecate normal PR mode
2023-04-26 Dmitry Selyutinpysvp64dis: deprecate pr tests
2023-04-26 Dmitry Selyutinpysvp64asm: deprecate pr tests
2023-04-26 Dmitry Selyutinpower_enums: sync forms
2023-04-25 Luke Kenneth... add CW and CW2 Form
2023-04-25 Luke Kenneth... check RC1, add data-dependent fail-first LD/ST test
2023-04-25 Jacob Lifshayreplace min/max[su][.] with minmax[.]
2023-04-25 Jacob Lifshayadd unofficial and comment2 columns to minor_19.csv
2023-04-25 Jacob Lifshayadd MM-form
2023-04-25 Jacob Lifshayfix bug where pseudo-code assignments modify more than...
2023-04-21 Jacob Lifshayrename/convert/merge XLCASTU/XLCASTS to EXTZXL/EXTSXL change-xlenification-bug-1064
2023-04-21 Jacob Lifshayrewrite all uses of XLCASTU/XLCASTS
2023-04-21 Jacob Lifshayadd EXTZ since it's in PowerISA v3.1B (see lbz for...
2023-04-20 Jacob Lifshayfix EXTSXL/XLCASTU/XLCASTS when inputs are python ints
2023-04-20 Jacob Lifshayuse proper cast function
2023-04-20 Jacob Lifshaychange XLEN-ification
2023-04-20 Jacob Lifshaychange extsb/h/w to scale based on XLEN rather than...
2023-04-18 Jacob Lifshayadd shaddw
2023-04-18 Jacob Lifshayspelling fix
2023-04-12 Dmitry Selyutinmedia: migrate to binutils
2023-04-10 Dmitry Selyutinsv_binutils: fix broken script
2023-04-06 Luke Kenneth... add power_decode_svp64_rm.py capability for new LD...
2023-04-04 Luke Kenneth... add quick test_pysvp64dis.py of LD/ST data-dependent...
2023-04-04 Luke Kenneth... https://bugs.libre-soc.org/show_bug.cgi?id=1047
2023-04-04 Luke Kenneth... whitespace cleanup (80 char per line hard limit)
2023-04-04 Luke Kenneth... comment about massive unnecessary code-duplication...
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