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yosys.git
2019-04-08 Eddie HungCope with undoing #895 commit | commitdiff | tree
2019-04-08 Eddie HungRevert "Remove handling for $pmux, since #895" commit | commitdiff | tree
2019-04-06 Eddie HungCall shregmap twice -- once for variable, another for... commit | commitdiff | tree
2019-04-05 Eddie HungMerge branch 'eddie/fix_retime' into xc7srl commit | commitdiff | tree
2019-04-05 Eddie HungAdd retime test commit | commitdiff | tree
2019-04-05 Eddie HungFix S0 -> S1 commit | commitdiff | tree
2019-04-05 Eddie HungMove dffinit til after abc commit | commitdiff | tree
2019-04-05 Eddie HungMerge branch 'eddie/fix_retime' into xc7srl commit | commitdiff | tree
2019-04-05 Eddie HungMove techamp t:$_DFF_?N? to before abc call commit | commitdiff | tree
2019-04-05 Eddie HungRetry commit | commitdiff | tree
2019-04-05 Eddie Hung"&nf -D 0" fails => use "-D 1" instead commit | commitdiff | tree
2019-04-05 Eddie HungResolve @daveshah1 comment, update synth_xilinx help commit | commitdiff | tree
2019-04-05 Eddie Hungsynth_xilinx to techmap FFs after abc call, otherwise... commit | commitdiff | tree
2019-04-05 Eddie Hungabc -dff now implies "-D 0" otherwise retiming doesn... commit | commitdiff | tree
2019-04-05 Eddie Hungtechmap inside map_cells stage commit | commitdiff | tree
2019-04-05 Clifford WolfAdd "read_ilang -lib" commit | commitdiff | tree
2019-04-04 Clifford WolfAdded missing argument checking to "mutate" command commit | commitdiff | tree
2019-04-04 Eddie HungMerge branch 'map_cells_before_map_luts' into xc7srl commit | commitdiff | tree
2019-04-04 Eddie HungMissing techmap entry in help commit | commitdiff | tree
2019-04-04 Eddie HungUse soft-logic, not LUT3 instantiation commit | commitdiff | tree
2019-04-04 Eddie HungMerge branch 'map_cells_before_map_luts' into xc7srl commit | commitdiff | tree
2019-04-04 Eddie Hungsynth_xilinx to map_cells before map_luts commit | commitdiff | tree
2019-04-04 Eddie HungCleanup comments commit | commitdiff | tree
2019-04-04 Eddie Hungt:$dff* -> t:$dff t:$dffe commit | commitdiff | tree
2019-04-03 Eddie HungRemove handling for $pmux, since #895 commit | commitdiff | tree
2019-04-03 Eddie Hung-nosrl meant when -nobram commit | commitdiff | tree
2019-04-03 Eddie HungRemove duplicate STARTUPE2 commit | commitdiff | tree
2019-04-03 Eddie HungDisable shregmap in synth_xilinx if -retime commit | commitdiff | tree
2019-04-03 Eddie HungAdd changelog entry commit | commitdiff | tree
2019-04-03 Eddie HungMerge pull request #913 from smunaut/fix_proc_mux commit | commitdiff | tree
2019-04-03 Sylvain Munautproc_mux: Fix crash when trying to optimize non-existan... commit | commitdiff | tree
2019-04-03 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl commit | commitdiff | tree
2019-04-03 Clifford WolfMerge pull request #912 from YosysHQ/bram_addr_en commit | commitdiff | tree
2019-04-03 Clifford WolfMerge pull request #910 from ucb-bar/memupdates commit | commitdiff | tree
2019-04-02 David Shahmemory_bram: Consider read enable for address expansion... commit | commitdiff | tree
2019-04-02 Eddie HungMerge pull request #895 from YosysHQ/pmux2shiftx commit | commitdiff | tree
2019-04-01 Jim LawsonRefine memory support to deal with general Verilog... commit | commitdiff | tree
2019-03-29 Clifford WolfMerge pull request #907 from YosysHQ/clifford/fix906 commit | commitdiff | tree
2019-03-29 Clifford WolfBuild Verilog parser with -DYYMAXDEPTH=100000, fixes... commit | commitdiff | tree
2019-03-28 Clifford WolfMerge pull request #901 from trcwm/libertyfixes commit | commitdiff | tree
2019-03-28 Clifford WolfMerge pull request #903 from YosysHQ/bram_reset_transp commit | commitdiff | tree
2019-03-27 David Shahmemory_bram: Reset make_transp when growing read ports commit | commitdiff | tree
2019-03-27 Niels MoseleyLiberty file parser now accepts superfluous ; commit | commitdiff | tree
2019-03-27 Niels MoseleyLiberty file parser now accepts superfluous ; commit | commitdiff | tree
2019-03-27 Niels MoseleyLiberty file parser now accepts superfluous ; commit | commitdiff | tree
2019-03-27 Clifford WolfAdd "read -verific" and "read -noverific" commit | commitdiff | tree
2019-03-27 Clifford WolfAdd "rename -output" commit | commitdiff | tree
2019-03-27 Clifford WolfImprove "rename" help message commit | commitdiff | tree
2019-03-26 Clifford WolfAdd "cutpoint -undef" commit | commitdiff | tree
2019-03-26 Clifford WolfAdd "hdlname" attribute commit | commitdiff | tree
2019-03-26 Clifford WolfFix "verific -extnets" for more complex situations commit | commitdiff | tree
2019-03-25 Eddie Hungsynth_xilinx to use shregmap with -minlen 3 commit | commitdiff | tree
2019-03-25 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl commit | commitdiff | tree
2019-03-25 Clifford WolfAdd "cutpoint" pass commit | commitdiff | tree
2019-03-25 Eddie HungCreate one $shiftx per bit in width commit | commitdiff | tree
2019-03-25 Clifford WolfMerge pull request #896 from YosysHQ/transp_fixes commit | commitdiff | tree
2019-03-25 Clifford WolfMerge pull request #897 from trcwm/libertyfixes commit | commitdiff | tree
2019-03-25 Niels Moseleyspaces -> tabs commit | commitdiff | tree
2019-03-25 Niels MoseleyEOL is now accepted as ';' replacement on lines that... commit | commitdiff | tree
2019-03-24 Niels MoseleyUpdated the liberty parser to accept [A:B] ranges ... commit | commitdiff | tree
2019-03-24 David Shahmemory_bram: Fix multiclock make_transp commit | commitdiff | tree
2019-03-23 Eddie HungAdd a pmux-to-shiftx optimisation to proc_mux commit | commitdiff | tree
2019-03-23 Eddie HungCope with SHREG not having E port; Revert $pmux fine... commit | commitdiff | tree
2019-03-23 Clifford WolfAdd "mutate -none -mode", "mutate -mode none" commit | commitdiff | tree
2019-03-23 Clifford WolfAdd "mutate -s <filename>" commit | commitdiff | tree
2019-03-23 Clifford WolfMerge pull request #893 from YosysHQ/clifford/btormeminit commit | commitdiff | tree
2019-03-23 Clifford WolfAdd support for memory initialization to write_btor commit | commitdiff | tree
2019-03-23 Clifford WolfFix BTOR output tags syntax in writye_btor commit | commitdiff | tree
2019-03-23 Clifford WolfAdd RTLIL::Const::ext[su](), fix RTLIL::SigSpec::extend... commit | commitdiff | tree
2019-03-23 Eddie HungAdd support for SHREGMAP+$mux, also fine tune $pmux commit | commitdiff | tree
2019-03-23 Eddie HungLeftover printf commit | commitdiff | tree
2019-03-23 Eddie HungFixes for multibit commit | commitdiff | tree
2019-03-23 Eddie HungWorking for 1 bit commit | commitdiff | tree
2019-03-22 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl commit | commitdiff | tree
2019-03-22 Clifford WolfMerge pull request #889 from YosysHQ/clifford/fix888 commit | commitdiff | tree
2019-03-22 Clifford WolfMerge pull request #890 from YosysHQ/clifford/fix887 commit | commitdiff | tree
2019-03-22 David ShahMerge pull request #891 from YosysHQ/xilinx_keep commit | commitdiff | tree
2019-03-22 David Shahxilinx: Add keep attribute where appropriate commit | commitdiff | tree
2019-03-22 Clifford WolfTrim init attributes when resizing FFs in "wreduce... commit | commitdiff | tree
2019-03-21 Eddie HungAdd '-nosrl' option to synth_xilinx commit | commitdiff | tree
2019-03-21 Clifford WolfFix mem2reg handling of memories with upto data ports... commit | commitdiff | tree
2019-03-21 Clifford WolfImprove "read_verilog -dump_vlog[12]" handling of upto... commit | commitdiff | tree
2019-03-21 Clifford WolfImprove read_verilog debug output capabilities commit | commitdiff | tree
2019-03-21 Eddie HungOpt commit | commitdiff | tree
2019-03-20 Eddie HungFix spacing commit | commitdiff | tree
2019-03-20 Eddie HungFine tune cells_map.v commit | commitdiff | tree
2019-03-20 Eddie HungRevert $__SHREG_ to orig; use $__XILINX_SHREG for varia... commit | commitdiff | tree
2019-03-20 Eddie HungAdd support for variable length Xilinx SRL > 128 commit | commitdiff | tree
2019-03-19 Eddie HungRestore original synth_xilinx commands commit | commitdiff | tree
2019-03-19 Eddie HungFix spacing commit | commitdiff | tree
2019-03-19 Eddie Hungshregmap -tech xilinx to delete $shiftx for var length SRL commit | commitdiff | tree
2019-03-19 Eddie HungFix INIT for variable length SRs that have been bumped... commit | commitdiff | tree
2019-03-19 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl commit | commitdiff | tree
2019-03-19 Eddie HungMake output port a non chain user commit | commitdiff | tree
2019-03-19 Clifford WolfMerge pull request #885 from YosysHQ/clifford/fix873 commit | commitdiff | tree
2019-03-19 Clifford WolfAdd Xilinx negedge FFs to synth_xilinx dffinit call... commit | commitdiff | tree
2019-03-19 Eddie HungMerge pull request #808 from eddiehung/read_aiger commit | commitdiff | tree
2019-03-19 Eddie HungMerge https://github.com/YosysHQ/yosys into read_aiger commit | commitdiff | tree
2019-03-19 Eddie HungAdd author name commit | commitdiff | tree
2019-03-19 Clifford WolfMerge pull request #884 from zachjs/master commit | commitdiff | tree
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