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yosys.git
2018-08-20
Benedikt Tutzer
added some checks if python is enabled to make sure...
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2018-08-20
Benedikt Tutzer
Two passes are not allowed to have the same filename
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2018-08-20
Benedikt Tutzer
The share directory cannot be searched when used as...
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2018-08-20
Benedikt Tutzer
Python passes are now looked for in share/plugins and...
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2018-08-20
Benedikt Tutzer
Fixed issue when using a python plugin in the yosys...
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2018-08-16
Benedikt Tutzer
Python Passes can now be added with the -m option or...
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2018-08-13
Benedikt Tutzer
Added Wrappers for:
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2018-08-01
Benedikt Tutzer
Saving id and pointer to c++ object. Object is valid...
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2018-08-01
Benedikt Tutzer
Setup is called automatically when the module is loaded...
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2018-08-01
Benedikt Tutzer
Cleaned up comments
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2018-08-01
Benedikt Tutzer
removed unused library and already present compiler...
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2018-07-10
Benedikt Tutzer
Added Monitor class that can monitor all changes in...
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2018-07-10
Benedikt Tutzer
added destructors for wires and cells
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2018-07-09
Benedikt Tutzer
removed debug output
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2018-07-09
Benedikt Tutzer
commands can now be run on arbitrary designs, not only...
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2018-07-09
Benedikt Tutzer
multiple designs can now exist independent from each...
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2018-06-28
Benedikt Tutzer
Introduced namespace and removed class-prefixes to...
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2018-06-28
Benedikt Tutzer
changed references from hash-ids to IdString names
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2018-06-25
Benedikt Tutzer
added wrappers for Design, Modules, Cells and Wires
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2018-06-22
Benedikt Tutzer
added ENABLE_PYTHON option in build environment
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2018-06-21
Clifford Wolf
Add simplified "read" command, enable extnets in implic...
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2018-06-20
Clifford Wolf
Merge branch 'master' of github.com:YosysHQ/yosys
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2018-06-20
Clifford Wolf
Add automatic verific import in hierarchy command
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2018-06-20
Clifford Wolf
Merge pull request #572 from q3k/q3k/fix-protobuf-build
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2018-06-20
Sergiusz Bazanski
Fix protobuf build
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2018-06-19
Clifford Wolf
Merge pull request #571 from q3k/q3k/protobuf-backend
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2018-06-19
Serge Bazanski
Add Protobuf backend
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2018-06-19
Clifford Wolf
Be slightly less aggressive in "deminout" pass
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2018-06-19
Clifford Wolf
Merge pull request #570 from edcote/patch-4
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2018-06-19
Edmond Cote
Include module name for area summary stats
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2018-06-15
Clifford Wolf
Bugfix in liberty parser (as suggested by aiju in ...
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2018-06-13
Clifford Wolf
Add "synth_ice40 -json"
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2018-06-11
Clifford Wolf
Fix ice40_opt for cases where a port is connected to...
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2018-06-06
Clifford Wolf
Merge pull request #561 from udif/pr_skip_typo
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2018-06-05
Udi Finkelstein
Fixed typo (sikp -> skip)
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2018-06-01
Clifford Wolf
Add (* gclk *) attribute support
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2018-06-01
Clifford Wolf
Add setundef -anyseq / -anyconst support to -undriven...
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2018-06-01
Clifford Wolf
Add "setundef -anyconst"
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2018-05-31
Clifford Wolf
Bugfix in handling of array instances with empty ports
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2018-05-30
Clifford Wolf
Update examples/cmos/counter.ys to use "synth" command
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2018-05-30
Clifford Wolf
Make -nordff the default in "prep"
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2018-05-30
Clifford Wolf
Update ABC to git rev 6df1396
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2018-05-28
Clifford Wolf
Disable memory_dff for initialized FFs
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2018-05-28
Clifford Wolf
Add some cleanup code to memory_nordff
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2018-05-28
Clifford Wolf
Add comment to VIPER #13453 work-around
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2018-05-25
Clifford Wolf
Fix Verific handling of single-bit anyseq/anyconst...
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2018-05-24
Clifford Wolf
Fix VerificClocking for cases where Verific generates...
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2018-05-24
Clifford Wolf
Fix verific handling of anyconst/anyseq attributes
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2018-05-19
Clifford Wolf
Merge pull request #454 from rqou/emscripten-and-abc
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2018-05-19
Robert Ou
Force abc to align memory to 8 bytes
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2018-05-19
Robert Ou
Modify emscripten main to mount nodefs and to run arg...
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2018-05-19
Robert Ou
Force abc to be linked statically and without threads...
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2018-05-19
Robert Ou
Fix infinite loop in abc command under emscripten
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2018-05-19
Robert Ou
Fix reading techlibs under emscripten
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2018-05-19
Robert Ou
Add options to disable abc's usage of pthreads and...
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2018-05-19
Robert Ou
Add an option to statically link abc into yosys
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2018-05-19
Robert Ou
Makefile: Make abc always use stdint.h
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2018-05-17
Clifford Wolf
Merge pull request #550 from jimparis/yosys-upstream
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2018-05-17
Clifford Wolf
Merge pull request #551 from olofk/ice40_cells_sim_ports
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2018-05-17
Olof Kindgren
Avoid mixing module port declaration styles in ice40...
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2018-05-17
Jim Paris
Support SystemVerilog `` extension for macros
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2018-05-17
Jim Paris
Skip spaces around macro arguments
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2018-05-15
Clifford Wolf
Fix handling of anyconst/anyseq attrs in VHDL code...
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2018-05-15
Clifford Wolf
Remove mercurial from build instructions
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2018-05-15
Clifford Wolf
Fix iopadmap for loops between tristate IO buffers
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2018-05-15
Clifford Wolf
Fix iopadmap for cases where IO pins already have buffe...
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2018-05-13
Clifford Wolf
Some cleanups in setundef.cc
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2018-05-13
Clifford Wolf
Use $(OS) in makefile to check for Darwin
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2018-05-13
Clifford Wolf
Merge pull request #505 from thefallenidealist/FreeBSD_...
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2018-05-13
Christian Krämer
Add "#ifdef __FreeBSD__"
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2018-05-13
Clifford Wolf
Revert "Add "#ifdef __FreeBSD__""
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2018-05-12
Sergiusz Bazanski
Also interpret '&' in liberty functions
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2018-05-12
Clifford Wolf
Add optimization of tristate buffer with constant contr...
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2018-05-12
Clifford Wolf
Add "hierarchy -simcheck"
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2018-05-06
Johnny Sorocil
update README
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2018-05-06
Johnny Sorocil
autotest.sh: Change from /bin/bash to /usr/bin/env...
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2018-05-06
Johnny Sorocil
Enable building on FreeBSD
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2018-05-05
Clifford Wolf
Further improve handling of zero-length SVA consecutive...
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2018-05-05
Clifford Wolf
Fix handling of zero-length SVA consecutive repetition
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2018-05-05
Johnny Sorocil
Add "#ifdef __FreeBSD__"
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2018-05-04
Clifford Wolf
Add ABC FAQ to "help abc"
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2018-05-04
Clifford Wolf
Add "yosys -e regex" for turning warnings into errors
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2018-05-04
Clifford Wolf
Merge pull request #537 from mithro/yosys-vpr
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2018-05-03
Clifford Wolf
Replace -ignore_redef with -[no]overwrite
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2018-05-03
Dan Gisselquist
Support more character literals
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2018-04-30
Clifford Wolf
Update ABC to git rev f23ea8e
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2018-04-30
Clifford Wolf
Add "synth_intel --noiopads"
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2018-04-22
Clifford Wolf
Add $dlatch support to write_verilog
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2018-04-18
Tim 'mithro...
Improving vpr output support.
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2018-04-18
Tim 'mithro...
synth_ice40: Rework the vpr blif output slightly.
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2018-04-16
Clifford Wolf
Add "synth_ice40 -nodffe"
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2018-04-15
Clifford Wolf
Add "write_blif -inames -iattr"
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2018-04-13
Clifford Wolf
Add statement labels for immediate assertions
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2018-04-12
Clifford Wolf
Allow "property" in immediate assertions
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2018-04-12
Clifford Wolf
Improve Makefile error handling for when abc/ is a...
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2018-04-07
Clifford Wolf
Add PRIM_HDL_ASSERTION support to Verific importer
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2018-04-06
Clifford Wolf
Fix handling of $global_clocking in Verific
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2018-04-06
Clifford Wolf
Add documentation for anyconst/anyseq/allconst/allseq...
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2018-04-06
Clifford Wolf
Add read_verilog anyseq/anyconst/allseq/allconst attrib...
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2018-04-06
Clifford Wolf
Add Verific anyseq/anyconst/allseq/allconst attribute...
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