nmigen.git
2020-02-06 whitequarkback.pysim: emit toplevel inputs in VCD files as well.
2020-02-06 whitequarkback.pysim: make `write_vcd(traces=)` actually use...
2020-02-06 whitequarkhdl.dsl: reject name mismatch in `m.domains.<name>...
2020-02-06 whitequarkhdl.dsl: type check when adding to m.domains.
2020-02-06 whitequarkhdl.mem: add synthesis attribute support.
2020-02-06 whitequarkhdl.mem: document Memory.
2020-02-04 whitequarkhdl.{ast,dsl}: allow whitespace in bit patterns.
2020-02-01 whitequarkhdl.ast: update documentation for Signal.
2020-02-01 whitequarkhdl.ast: prohibit shifts by signed value.
2020-02-01 whitequarkbuild.plat: align pipeline with Fragment.prepare().
2020-02-01 whitequarkhdl.dsl: don't allow inheriting from Module.
2020-02-01 whitequarkhdl.ast: warn on unused property statements (Assert...
2020-02-01 whitequark_unused: extract must-use logic from hdl.ir.
2020-01-31 whitequarkhdl.dsl: add missing case width check for Enum values.
2020-01-31 whitequarkREADME: clarify relationship to Migen.
2020-01-31 whitequarkhdl.dsl: make `if m.{If,Elif,Else}(...)` a syntax error.
2020-01-31 whitequarkback.rtlil: don't emit wires for empty signals.
2020-01-31 Mike Waltersvendor.lattice_ecp5: support internal oscillator (OSCG).
2020-01-31 Jaro Habigerbuild.dsl: allow strings to be used as connector numbers.
2020-01-31 Sylvain Munautvendor.lattice_{ice40,ecp5}: Support .il (RTLIL) files...
2020-01-27 whitequarkUpdate README.
2020-01-18 whitequarkhdl.ir: resolve hierarchy conflicts before creating...
2020-01-17 whitequarkhdl.xfrm: transform drivers as well in DomainRenamer.
2020-01-12 whitequarkRemove everything deprecated in nmigen 0.1.
2020-01-11 Staf VerhaegenSignal: allow to use integral Enum for reset value.
2020-01-09 schwigivendor.intel: fix output enable width for XDR=0 case.
2020-01-07 Alain Péteutbuild.run: fix indentation.
2020-01-01 whitequarkback.rtlil: do not consider unreachable array elements...
2019-12-15 whitequarkhdl.mem: fix src_loc_at in ReadPort, WritePort.
2019-12-04 Marcin Kościelnickihdl.ast: Fix width for unary minus operator on signed...
2019-12-02 whitequarkback.pysim: fix miscompilation of Signal(unsigned)...
2019-12-02 whitequarkhdl.ast: actually remove simulator commands.
2019-12-01 Dan Ravensloftvendor.intel: silence meaningless warnings in nMigen...
2019-11-28 whitequarkback.pysim: redesign the simulator.
2019-11-27 whitequarkback.rtlil: infer bit width for instance parameters.
2019-11-26 whitequarkhdl.ir: for instance ports, prioritize defs over uses.
2019-11-18 Jean-François... vendor.xilinx_*: Set IOB attribute on cels instead...
2019-11-18 whitequarkback.rtlil: extend shorter operand of a binop when...
2019-11-15 whitequarkbuild.plat: in Platform.add_file(), allow adding exact...
2019-11-15 whitequarktest: add tests for build.plat.Platform.add_file.
2019-11-09 whitequarkhdl.rec: fix Record.like() being called through a subclass.
2019-11-09 Staf Verhaegenhdl.rec: make Record(name=) keyword-only.
2019-11-07 whitequarkhdl.ir: lower domains before resolving hierarchy conflicts.
2019-11-02 whitequarkImprove .gitignore.
2019-10-28 whitequarkback.verilog: remove $verilog_initial_trigger after...
2019-10-26 whitequarktest: use `#nmigen:` magic comment instead of monkey...
2019-10-26 whitequarkhdl.ir: allow disabling UnusedElaboratable warning...
2019-10-26 whitequarkback.rtlil: avoid exponential behavior when legalizing...
2019-10-26 whitequarkback.rtlil: fix lowering of Part() on LHS to account...
2019-10-26 whitequarkhdl.ast: simplify {bit,word}_select with constant offset.
2019-10-21 whitequarkExplicitly restrict prelude imports.
2019-10-17 whitequarkcompat.fhdl.specials: fix argument parsing compatibility.
2019-10-16 whitequarklib.io: use keyword-only arguments in Pin().
2019-10-16 whitequarksetup: fix commit 5198d99b.
2019-10-16 Sebastien Bourdeauducqverilog: fix yosys version error message
2019-10-16 whitequarkback.verilog: fix Yosys version check.
2019-10-15 whitequarksetup: don't append local version for tags.
2019-10-14 whitequarkvendor.lattice_ice40: fix commit 88649def.
2019-10-13 whitequarkvendor.lattice_{ice40,ecp5}: fix typo.
2019-10-13 whitequarkvendor.lattice_ice40: use pcf files instead of pre...
2019-10-13 whitequarkbuild.plat: batch files use EQU, not EQ.
2019-10-13 whitequark{,_}tools→{,_}utils
2019-10-13 whitequarkvendor.lattice_{ice40,ecp5}: emit Verilog as well,...
2019-10-13 whitequarkbuild.plat: fold emit_prelude() into emit_commands().
2019-10-13 EmilyRefactor build script toolchain lookups.
2019-10-13 whitequarkhdl.ir: allow ClockSignal and ResetSignal in ports.
2019-10-13 whitequarkhdl.ir: cast instance port connections to Values.
2019-10-13 whitequarkcompat.fhdl.decorators: improve backwards compatibility.
2019-10-13 whitequarkcompat.fhdl.bitcontainer: update Value.wrap call.
2019-10-12 whitequarkdoc: bring COMPAT_SUMMARY up to date.
2019-10-12 whitequarkcompat.genlib.fsm: add migration warning.
2019-10-12 whitequarkcompat.fhdl.decorators: add migration warnings.
2019-10-12 whitequarkhdl.ast: rename Slice.end back to Slice.stop.
2019-10-12 whitequarkcompat.fhdl.structure: remove SPECIAL_* constants.
2019-10-12 whitequark_tools: extract most utility methods to a private package.
2019-10-12 Jean-François... back.rtlil: fix DeprecationWarning. NFC.
2019-10-11 whitequarkRename remaining `wrap` methods to `cast`.
2019-10-11 whitequarkhdl.ast: deprecate shapes like `(1, True)` in favor...
2019-10-11 whitequarkhdl.ast: deprecate Signal.{range,enum}.
2019-10-11 whitequarkhdl.ast: add an explicit Shape class, included in prelude.
2019-10-11 whitequarkConsistently use {!r}, not '{!r}' in diagnostics.
2019-10-11 whitequarkhdl.ast: Operator.{op→operator}
2019-10-11 whitequarkhdl.ast: simplify enum handling.
2019-10-11 whitequarkhdl.ast: Value.{wrap→cast}
2019-10-10 whitequarkvendor.xilinx_ultrascale: new supported family.
2019-10-10 whitequarkxilinx_7series: add grade platform property.
2019-10-10 whitequarkvendor.lattice_machxo2: new supported family.
2019-10-10 whitequarkvendor: yosys is a required tool for all Verilog-based...
2019-10-10 whitequarkREADME: add device support matrix.
2019-10-10 whitequarkvendor.intel: add Quartus support.
2019-10-09 whitequarkexamples: update blinky, add some explanatory text...
2019-10-09 whitequarkbuild.plat: elaborate result of create_missing_domain...
2019-10-09 whitequarkbuild.plat: don't create default sync domain as reset...
2019-10-09 whitequarkbuild.plat,vendor: always synchronize reset in default...
2019-10-06 whitequarkback.rtlil: don't crash legalizing values with no branches.
2019-10-04 whitequarkback.rtlil: avoid unsoundness for division by zero.
2019-10-04 whitequarkhdl.ast: prohibit signed divisors.
2019-10-03 whitequarkbuild.dsl: accept Pins(invert=True).
2019-10-02 whitequarkhdl.ast: don't crash on Mux(<bool>, ...).
2019-10-02 whitequarkback.rtlil: don't cache wires for legalized switch...
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