openpower-isa.git
2021-06-27 Luke Kenneth... add new (experimental) ffmadds and ffmsubs, for FFT...
2021-06-27 Luke Kenneth... override logic for getting FRS in SVP64 FFT mode
2021-06-27 Luke Kenneth... add FRS decode (2nd output) for SVP64 FFT FP mul-add...
2021-06-27 Luke Kenneth... change name to OP_FP_MADD to identify fmadd (etc)
2021-06-27 Luke Kenneth... comments on SVP64 LD/ST Mode detection
2021-06-27 Luke Kenneth... add SVP64 FFT mode to PowerDecoder, add CSV entries
2021-06-26 Luke Kenneth... add LD bit-reversed unit test
2021-06-26 Luke Kenneth... comment out l*br pseudo-ops from power_enums.py
2021-06-26 Luke Kenneth... use If Elif in power_decoder conditions, a lot easier...
2021-06-26 Luke Kenneth... rename bit-reversed LDs to match v3.0B (strip "br")
2021-06-26 Luke Kenneth... move D const update to after picking up main input...
2021-06-25 Luke Kenneth... identify SVP64 LD bit-reverse pattern as pseudo-assembler
2021-06-25 Luke Kenneth... only set conditions in PowerDecoder2 for svp64 mode
2021-06-25 Luke Kenneth... update sv_analysis.py to match new CONDITIONs field...
2021-06-25 Luke Kenneth... rename svp64 bit-reversed LD instructions to not confli...
2021-06-24 Luke Kenneth... whoops SVP64 bit-rev LDs need to use SVD and SVDS immed...
2021-06-24 Luke Kenneth... allow default decoder to be created with no col/row...
2021-06-24 Luke Kenneth... add in Power Decoder conditions to select SVP64 bit...
2021-06-24 Luke Kenneth... add "conditions" for PowerDecoder, basic test
2021-06-24 Luke Kenneth... remove svp64 ld/st decoder tree
2021-06-24 Luke Kenneth... must pass in conditions into Sub-decoders
2021-06-24 Luke Kenneth... search for CSV "Conditions", set to static (disabled...
2021-06-24 Luke Kenneth... add major.csv LD operations with SVP64BREV condition
2021-06-24 Luke Kenneth... add PowerDecoder condition switches (untested, doesnt...
2021-06-24 Luke Kenneth... was going to set 2nd decoder up through MUX but now...
2021-06-24 Luke Kenneth... add extra CONDITION column to CSVs
2021-06-24 Luke Kenneth... whoops fix rounding error in mapreduce unit test
2021-06-24 Luke Kenneth... only add svdecldst in PowerDecoder2 or LDST PowerDecode...
2021-06-24 Luke Kenneth... use PowerOp copy of PowerDecodeSubset in get_op
2021-06-24 Luke Kenneth... add "user_svp64_ldst_dec" flag to PowerDecodeSubset
2021-06-24 Luke Kenneth... use new PowerOp.like function in PowerDecoder, fix...
2021-06-24 Luke Kenneth... use get_op on "internal_op" instead of self.dec.op...
2021-06-24 Luke Kenneth... do shorter-path detection of SVP64 LD/ST bitreverse...
2021-06-24 Luke Kenneth... tidy up PowerOp and rename svp64 ldst decoder creater
2021-06-24 Luke Kenneth... add comment about perfcounters
2021-06-23 Luke Kenneth... get op always using function PowerDecoder.op_get
2021-06-23 Luke Kenneth... add PowerOp.like function to be able to duplicate a...
2021-06-23 Luke Kenneth... add SVP64 alternative LDST decoder (unused so far)
2021-06-23 Luke Kenneth... only add SVP64 bitreverse mode for LDs at the moment...
2021-06-23 Luke Kenneth... add SVP64 LD/ST "bitrev" alternative CSV
2021-06-23 Luke Kenneth... add sv bitrev "major" CSV table
2021-06-23 Luke Kenneth... add start of bit-reverse mode for LD/ST to SVP64 encode...
2021-06-23 Luke Kenneth... looks like spec error on maddhd etc. should be a comma...
2021-06-23 Luke Kenneth... add mul-add to list of instructions
2021-06-23 Luke Kenneth... add ASCII art example to int predicated SVP64
2021-06-23 Luke Kenneth... add VL and srcstep to ISACaller namespace
2021-06-23 Luke Kenneth... add SHL64 helper function
2021-06-23 Luke Kenneth... add bitrev to pywriter autogenerator
2021-06-23 Luke Kenneth... add bitrev function to be used in LD-ST-bitrev FFT/DCT
2021-06-23 Luke Kenneth... better ways to do sign-inversion (without multiply...
2021-06-23 Luke Kenneth... add sign-inversion argument to FPMUL/DIV helpers
2021-06-23 Luke Kenneth... add comments for SVP64 FP FFT/DCT
2021-06-23 Luke Kenneth... add FFT/DCT to titles
2021-06-23 Luke Kenneth... add SV FP arithmetic in "Overflow" mode for FFT/DCT +/-
2021-06-23 Luke Kenneth... use SHL64 function for shift because "<<" operator...
2021-06-23 Luke Kenneth... add in bitreverse function call into svfixedload
2021-06-23 Luke Kenneth... add RC and SVD/SVDS-Form to svfixedload
2021-06-23 Luke Kenneth... add svfixedload.mdwn at correct place
2021-06-23 Luke Kenneth... add SVD-Form and SVDS-Form, variants of fixedload for...
2021-06-19 Luke Kenneth... 128 regs added to simulator - works
2021-06-19 Luke Kenneth... sigh cannot add comments at end of SV lines in SVP64...
2021-06-19 Luke Kenneth... increase number of registers to 128 in pypowersim
2021-06-19 Luke Kenneth... set regfile in ISACaller equal to length of initial...
2021-06-19 Luke Kenneth... add mapreduce "reverse gear" unit tests
2021-06-19 Luke Kenneth... add mapreduce "reverse gear" to PowerDecoder2. gets...
2021-06-19 Luke Kenneth... add decode of "reverse gear" in SVP64 reduce mode
2021-06-19 Luke Kenneth... add "reverse-gear" mode to mapreduce in SVP64
2021-06-18 Luke Kenneth... add SV Context SPRs (SVCTX0-7)
2021-06-18 Luke Kenneth... add SVR-Form and associated fields
2021-06-18 Luke Kenneth... add four SVSHAPE SPRs for REMAP
2021-06-17 Luke Kenneth... add SV "Context Propagation" Form
2021-06-17 Luke Kenneth... add SVP64REMAP Record
2021-06-17 Luke Kenneth... shuffle comments
2021-06-17 Luke Kenneth... fix MP3 CODEC basic demo by using fmuls and fadds/fsubs...
2021-06-16 Luke Kenneth... sorted out order of FPMULADD32 helper, only have roundi...
2021-06-16 Luke Kenneth... add extra comments to mp3 svp64 codec assembler
2021-06-16 Luke Kenneth... fix fmadds/fmsubs FPMULADD32 helper
2021-06-16 Luke Kenneth... more code-comments in mp3 codec svp64 example
2021-06-16 Luke Kenneth... although unused read first sum from *dither_state
2021-06-16 Luke Kenneth... use addi where sv.addi is inappropriate (scalar values)
2021-06-16 Luke Kenneth... reorder arguments to FPMULADD32 to match pseudocode
2021-06-16 Luke Kenneth... use fnmsubs instead of fmadds followed by fsubs
2021-06-16 Luke Kenneth... fnmadds and fnmsubs were inverted
2021-06-16 Luke Kenneth... ad fnmadd and fnmsubs to ISA pseudocode
2021-06-16 Luke Kenneth... reverting removal of tmpsum and tmpsum2, not using...
2021-06-15 Luke Kenneth... whoops forgot import
2021-06-15 Luke Kenneth... whoops still using DOUBLE(SINGLE(x)) rather than DOUBLE...
2021-06-15 Luke Kenneth... remove predicate mask r30, no longer needed
2021-06-15 Luke Kenneth... no need for tmpsu or tmpsum2, fmadds if replaced with...
2021-06-15 Luke Kenneth... use new sv.fmadds SVP64 instruction in MP3 CODEC assembler
2021-06-15 Luke Kenneth... fix sv_analysis.py for 3R-1W-CRo case, add fmadds/fmsub...
2021-06-15 Luke Kenneth... mark as possible bug, the fneg sum,sum
2021-06-15 Luke Kenneth... add fmadds and fmsubs to Power ISA pseudo-code, add...
2021-06-15 Luke Kenneth... remove negate of sum for last value in SVP64 MP3 CODEC...
2021-06-15 Luke Kenneth... SVP64 mp3 assembler almost correct
2021-06-15 Luke Kenneth... add comments into mapreduce example
2021-06-15 Luke Kenneth... whoops overlap of fv0-2 with sum/2/tmp, move further up
2021-06-14 Luke Kenneth... sigh bug in setvl, temporarily setting to 7 not 8
2021-06-14 Luke Kenneth... nope, win = win2 + 31
2021-06-14 Luke Kenneth... guessing probably supposed to be 128 not 124
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