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yosys.git
2021-11-13
Patrick Urban
Allow initial blocks to be disabled during tests
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2021-11-13
Patrick Urban
synth_gatemate: Apply review remarks
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2021-11-13
Patrick Urban
synth_gatemate: Apply review remarks
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2021-11-13
Patrick Urban
synth_gatemate: Initial implementation
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2021-11-13
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2021-11-12
Marcelina Kościelnicka
show: Fix wire bit indexing.
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2021-11-12
Miodrag Milanovic
update abc
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2021-11-12
Miodrag Milanovic
Update abc
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2021-11-11
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2021-11-10
Claire Xen
Merge pull request #3075 from YosysHQ/micko/verific_mem...
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2021-11-10
Claire Xen
Merge pull request #3077 from YosysHQ/claire/genlib
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2021-11-10
Claire Xen
Spelling fix in abc.cc
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2021-11-10
Claire Xenia...
Add genlib support to ABC command
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2021-11-10
Marcelina Kościelnicka
iopadmap: Fix ebmarassing typo
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2021-11-10
Miodrag Milanovic
No need to alocate more memory than used
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2021-11-10
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2021-11-10
Kamil Rakoczy
genrtlil: Fix displaying debug info in packages
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2021-11-09
Marcelina Kościelnicka
iopadmap: Add native support for negative-polarity...
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2021-11-09
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2021-11-08
Miodrag Milanović
Update CODEOWNERS
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2021-11-08
Miodrag Milanović
Limit macOS GH actions
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2021-11-08
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2021-11-07
Pepijn de Vos
synth_gowin: move splitnets to after iopadmap (#2435)
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2021-11-07
Gabriel Somlo
manual: fix pdflatex inputenc undefined char error
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2021-11-07
Pepijn de Vos
Remove noalu from synth_gowin json output as Apicula...
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2021-11-07
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2021-11-06
Pepijn de Vos
gowin: widelut support (#3042)
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2021-11-06
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2021-11-05
Miodrag Milanovic
Next dev cycle
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2021-11-05
Miodrag Milanovic
Release version 0.11
yosys-0.11
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2021-11-05
Miodrag Milanovic
Must use latest flex to generate c++17 compatible code
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2021-11-05
Miodrag Milanovic
Make it work on all
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2021-11-05
Miodrag Milanovic
Correct way of setting maybe_unsused on labels
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2021-11-05
Miodrag Milanovic
Add missing changelog item
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2021-11-05
Miodrag Milanovic
Update command reference
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2021-11-05
Miodrag Milanović
Merge pull request #3067 from YosysHQ/aki/ci_update
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2021-11-05
Miodrag Milanovic
Removed semicolon from macro
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2021-11-03
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2021-11-02
Marcelina Kościelnicka
flatten: Keep sigmap around between flatten_cell invoca...
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2021-11-02
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2021-11-01
Claire Xen
Merge pull request #3068 from YosysHQ/claire/verific_cfg
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2021-11-01
Claire Xenia...
Add "verific -cfg" command
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2021-11-01
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2021-11-01
Aki Van Ness
ci: removed the old `test.yml` workflow, as it was...
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2021-11-01
Aki Van Ness
ci: expanded the macOS tests suite to cover more compil...
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2021-11-01
Aki Van Ness
ci: expanded the Linux test suite to cover more compile...
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2021-11-01
Aki Van Ness
Changed the Makefile to have an explicit `CXXSTD` param...
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2021-10-31
Claire Xen
Merge pull request #3066 from YosysHQ/claire/verific_gclk
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2021-10-31
Claire Xenia...
Fix verific gclk handling for async-load FFs
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2021-10-30
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2021-10-29
Miodrag Milanovic
Add missing items in CHANGELOG
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2021-10-29
Miodrag Milanovic
Update command reference part of manual
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2021-10-28
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2021-10-27
Miodrag Milanović
Merge pull request #3063 from YosysHQ/micko/verific_aldff
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2021-10-27
Marcelina Kościelnicka
ecp5: Add support for mapping aldff.
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2021-10-27
Miodrag Milanovic
Enable async load dff emit by default in Verific
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2021-10-27
Miodrag Milanovic
Revert "Compile option for enabling async load verific...
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2021-10-27
Marcelina Kościelnicka
proc_dff: Emit $aldff.
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2021-10-27
Marcelina Kościelnicka
dfflegalize: Add tests for aldff lowering.
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2021-10-27
Marcelina Kościelnicka
dfflegalize: Add tests targetting aldff.
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2021-10-27
Marcelina Kościelnicka
dfflegalize: Refactor, add aldff support.
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2021-10-27
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2021-10-26
Zachary Snow
verilog: use derived module info to elaborate cell...
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2021-10-26
Rupert Swarbrick
Split out logic for reprocessing an AstModule
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2021-10-26
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2021-10-25
Miodrag Milanovic
Compile option for enabling async load verific support
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2021-10-22
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2021-10-21
Marcelina Kościelnicka
Change implicit conversions from bool to Sig* to explicit.
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2021-10-21
Claire Xen
Merge pull request #3057 from YosysHQ/claire/verific_la...
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2021-10-21
Claire Xenia...
Fix verific.cc PRIM_DLATCH handling
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2021-10-21
Claire Xenia...
Initial Verific impoter support for {PRIM,WIDE_OPER...
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2021-10-21
Marcelina Kościelnicka
extract_reduce: Refactor and fix input signal construction.
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2021-10-21
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2021-10-20
Miodrag Milanovic
If verific have vhdl lib it is required by other libs
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2021-10-20
Miodrag Milanovic
Forgot to remove from main list
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2021-10-20
Miodrag Milanovic
Option to disable verific VHDL support
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2021-10-20
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2021-10-19
Claire Xenia...
Fixed Verific parser error in ice40 cell library
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2021-10-19
Miodrag Milanović
Merge pull request #3045 from galibert/master
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2021-10-19
Claire Xenia...
Fixes in vcdcd.pl for newer Perl versions
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2021-10-18
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2021-10-17
Paul Annesley
dfflegalize: remove redundant check for initialized...
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2021-10-17
Olivier Galibert
CycloneV: Add (passthrough) support for cyclonev_oscillator
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2021-10-17
Olivier Galibert
CycloneV: Add (passthrough) support for cyclonev_hps_in...
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2021-10-16
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2021-10-15
Claire Xen
Merge pull request #3044 from YosysHQ/micko/verific_bufif1
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2021-10-14
Miodrag Milanovic
Support PRIM_BUFIF1 primitive
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2021-10-12
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2021-10-11
Claire Xen
Merge pull request #3039 from YosysHQ/claire/verific_aldff
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2021-10-11
Claire Xenia...
Add Verific adffe/dffsre/aldffe FIXMEs
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2021-10-11
Claire Xen
Merge pull request #3040 from YosysHQ/micko/split_modul...
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2021-10-11
Claire Xen
Merge pull request #3041 from YosysHQ/mmicko/module_attr
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2021-10-10
Miodrag Milanovic
Import module attributes from Verific
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2021-10-09
Miodrag Milanovic
Split module ports, 20 per line
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2021-10-09
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2021-10-08
Claire Xenia...
Fixes and add comments for open FIXME items
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2021-10-08
Claire Xenia...
Add support for $aldff flip-flops to verific importer
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2021-10-08
Marcelina Kościelnicka
Fix a regression from #3035.
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2021-10-08
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2021-10-07
Marcelina Kościelnicka
FfData: some refactoring.
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