gem5.git
2006-10-31 Gabe BlackMade the old name refer to the miscreg index to prevent...
2006-10-31 Gabe BlackForgot to change the index.
2006-10-31 Gabe BlackMake the IPRs use regular miscreg indexes, and make...
2006-10-31 Gabe BlackMissed a few instances of this function.
2006-10-31 Gabe BlackGet rid of old, commented out code.
2006-10-31 Gabe BlackMove IntrFlag into the MiscRegFile and get rid of speci...
2006-10-31 Gabe BlackPut the Alpha tlb stuff into the AlphaISA namespace...
2006-10-31 Steve ReinhardtDelete obsolete directories: src/oldmem, src/mem/timing...
2006-10-30 Lisa HsuFSConfig.py:
2006-10-30 Lisa Hsuse.py, fs.py:
2006-10-30 Lisa Hsuensure that there is a "/" between the cptdir and the...
2006-10-30 Lisa HsuMerge zizzer:/bk/newmem
2006-10-30 Lisa Hsudecouple the switch option from the warmup period optio...
2006-10-30 Kevin LimUse some python os.path stuff to make it more flexible...
2006-10-30 Lisa HsuMerge zizzer:/bk/newmem
2006-10-30 Lisa Hsuadd some comments and make the warmup period in a switc...
2006-10-29 Gabe BlackAn attempt to serialize the state of the micro code...
2006-10-29 Gabe BlackMove the mem classes into util.isa so that multiple...
2006-10-29 Gabe BlackFix when the IsDelayedCommit flag is set.
2006-10-29 Gabe BlackBring casa and casxa up to date
2006-10-29 Gabe BlackFixed ldstub to use the right format, and made the...
2006-10-29 Gabe BlackAdd an integer microcode register.
2006-10-28 Ali SaidiMerge zizzer:/bk/newmem
2006-10-28 Ali Saidiremove intel nic from SConscript
2006-10-28 Gabe BlackThis one really needs to be arch/faults.hh
2006-10-28 Gabe BlackInclude the right version of faults.hh
2006-10-28 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2006-10-28 Gabe BlackOne last adjustment to get rid of skew in the simple...
2006-10-27 Lisa HsuMerge zizzer:/bk/newmem
2006-10-27 Lisa Hsufactor out common run code from se.py and fs.py.
2006-10-27 Ali SaidiMerge zizzer:/bk/newmem
2006-10-27 Ali Saidiadd packet_access.hh
2006-10-27 Gabe BlackA more complete attempt to fix the clock skew.
2006-10-27 Gabe BlackPotential fix to clock skew problem.
2006-10-27 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2006-10-27 Gabe BlackUpdate stats for fill/spill handlers
2006-10-27 Gabe BlackGot rid of some outdated comments.
2006-10-27 Gabe BlackMade the regfile compatible with the new definitions...
2006-10-27 Gabe BlackClean up MiscRegFile
2006-10-27 Gabe BlackReorganized the MiscRegFile
2006-10-27 Gabe BlackCleaned up the decoder slightly.
2006-10-27 Gabe BlackAdded a few functions to stuff values into bitfields...
2006-10-27 Gabe BlackChanged the number of register windows to be more reali...
2006-10-27 Gabe BlackGot rid of some debug output
2006-10-27 Gabe BlackChange the default function from setMiscRegWithEffect...
2006-10-26 Lisa HsuMerge zizzer:/bk/newmem
2006-10-26 Lisa Hsuse.py:
2006-10-26 Ali SaidiMerge zizzer:/bk/newmem
2006-10-25 Ali SaidiFix simple timing port keep a list of all packets,...
2006-10-25 Gabe BlackFixed the priv instruction format.
2006-10-25 Gabe BlackImplemented the saved and restored instructions, fixed...
2006-10-25 Gabe BlackFixed the bitfield FCN to include the right bits.
2006-10-25 Gabe BlackImplemented the SPARC fill and spill handlers.
2006-10-25 Ron DreslinskiFix fixPacket functionality to calculate sizes properly
2006-10-24 Gabe BlackReplace the Alpha No op with a SPARC one.
2006-10-24 Ali SaidiFix fs.py. Lisa did you test this? Is there some wierd...
2006-10-24 Ali SaidiMerge zizzer:/bk/newmem
2006-10-24 Ali SaidiAdd more traceflags for ethernet
2006-10-24 Steve ReinhardtMerge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
2006-10-23 Lisa Hsuwarmup of 1B cpu cycles.
2006-10-23 Lisa HsuMerge zizzer:/bk/newmem
2006-10-23 Lisa Hsuget rid of the "resume" step at the end of changeToTimi...
2006-10-23 Lisa Hsumake this parallel to the other cpu types so that resum...
2006-10-23 Lisa Hsumake a lot of the same changes as to fs.py for checkpoi...
2006-10-23 Lisa Hsuchanges regarding fs.py
2006-10-23 Gabe BlackMinor compile fix. Not sure why this is broken.
2006-10-23 Gabe BlackMove around more SPARC memory code, and make block...
2006-10-23 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2006-10-23 Gabe BlackAdd reference outputs for SPARC on the atomic timing...
2006-10-23 Gabe BlackBroke Load/Store instructions into microcode, and parti...
2006-10-23 Gabe BlackDon't let interupts interupt microcode at undesired...
2006-10-23 Gabe BlackFiles in base shouldn't depend on things in sim. Change...
2006-10-23 Gabe BlackStart making memory ops work with InitiateAcc and Compl...
2006-10-23 Gabe BlackChange the default constructors to take ExtMachInsts...
2006-10-23 Steve ReinhardtClean up cache DPRINTFs
2006-10-23 Steve Reinhardts/pktuest/request/ (all in comments)
2006-10-22 Steve ReinhardtAdd DPRINTF for non-timed quiesce.
2006-10-22 Steve ReinhardtAdd mutex test to Benchmarks.py.
2006-10-22 Steve ReinhardtAnother missing case in a switch (like Nate's earlier...
2006-10-22 Steve ReinhardtHave tracediff print warning if no traceflags are set.
2006-10-22 Steve ReinhardtSmall bug fixes for timing LL/SC. Better now but
2006-10-22 Steve ReinhardtAdd Quiesce trace flag to track CPU quiesce/wakeup...
2006-10-22 Steve ReinhardtJust give up if a store conditional misses completely
2006-10-21 Steve ReinhardtFix formatting that got screwed up when tabs were removed.
2006-10-21 Steve ReinhardtRefactor coherence state table initialization.
2006-10-21 Steve ReinhardtMerge vm1.(none):/home/stever/bk/newmem-head
2006-10-21 Steve ReinhardtGet rid of unused handleTargets() function.
2006-10-21 Steve ReinhardtTweak a few things for better page fault debugging.
2006-10-21 Steve ReinhardtUpdated to work with new command line argument ordering.
2006-10-21 Nathan BinkertMerge zizzer.eecs.umich.edu:/bk/newmem
2006-10-21 Nathan BinkertMissing case
2006-10-21 Ron DreslinskiAdd some default options, point it to the /dist version...
2006-10-21 Ron DreslinskiMerge zizzer:/bk/newmem
2006-10-20 Ron DreslinskiClean up splash2 so it works in v2.0
2006-10-20 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2006-10-20 Nathan BinkertConstruct a correct value of PYTHONHOME from the interp...
2006-10-20 Ron DreslinskiGive physical memory some latency to stress the system
2006-10-20 Ron DreslinskiAdd a config file in the example with the memtester...
2006-10-20 Ron DreslinskiGet rid of a variable put back by merge.
2006-10-20 Ron DreslinskiMerge zizzer:/bk/newmem
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