git.libre-soc.org Git - yosys.git/shortlog

2019-09-27	Eddie Hung	Ooops AREG and BREG to default to -1	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	Update doc with max cascade chain of 20	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	Do not always zero out C (e.g. during cascade breaks)	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	Update doc	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	Zero out ports	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	xilinx_dsp_cascade to also cascade AREG and BREG	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	Try recursive pmgen for P cascade	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	Combine 'flatten' & 'coarse' labels in synth_ecp5 so...	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	Typo	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	CREG to check for \keep	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	Remove newline	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	select once	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	Stop trying to be too smart by prematurely optimising	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	mul2dsp.v slice names	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	Do not die if DSP48E1.P has no users (would otherwise...	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	Reject if (* init *) present	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	Remove unnecessary check for A_SIGNED != B_SIGNED;...	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	Revert "Remove _TECHMAP_CELLTYPE_ check since all ...	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	Revert "No need for $__mul anymore?"	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	Rework xilinx_dsp postAdd for new wreduce call	commit \| commitdiff \| tree
2019-09-26	Eddie Hung	Only wreduce on t:$add	commit \| commitdiff \| tree
2019-09-25	Eddie Hung	Remove _TECHMAP_CELLTYPE_ check since all $mul	commit \| commitdiff \| tree
2019-09-25	Eddie Hung	Fix memory issue since SigSpec& could be invalidated	commit \| commitdiff \| tree
2019-09-25	Eddie Hung	No need for $__mul anymore?	commit \| commitdiff \| tree
2019-09-25	Eddie Hung	unextend only used in init	commit \| commitdiff \| tree
2019-09-25	Eddie Hung	Call 'wreduce' after mul2dsp to avoid unextend()	commit \| commitdiff \| tree
2019-09-25	Eddie Hung	Oops. Actually use __NAME__ in ABC_DSP48E1 macro	commit \| commitdiff \| tree
2019-09-24	Eddie Hung	Add (* techmap_autopurge *) to abc_unmap.v too	commit \| commitdiff \| tree
2019-09-24	Eddie Hung	"abc_padding" attr for blackbox outputs that were padde...	commit \| commitdiff \| tree
2019-09-24	Eddie Hung	Force $inout.out ports to begin with '$' to indicate...	commit \| commitdiff \| tree
2019-09-24	Eddie Hung	Add techmap_autopurge to outputs in abc_map.v too	commit \| commitdiff \| tree
2019-09-24	Eddie Hung	Revert "Add a xilinx_finalise pass"	commit \| commitdiff \| tree
2019-09-24	Eddie Hung	Revert "Remove (* techmap_autopurge *) from abc_unmap...	commit \| commitdiff \| tree
2019-09-24	Eddie Hung	Revert "Vivado does not like zero width port connections"	commit \| commitdiff \| tree
2019-09-24	Eddie Hung	Vivado does not like zero width port connections	commit \| commitdiff \| tree
2019-09-24	Eddie Hung	Remove (* techmap_autopurge *) from abc_unmap.v since...	commit \| commitdiff \| tree
2019-09-24	Eddie Hung	Add a xilinx_finalise pass	commit \| commitdiff \| tree
2019-09-23	Eddie Hung	Set [AB]CASCREG to legal values	commit \| commitdiff \| tree
2019-09-23	Eddie Hung	Comment to explain separating CREG packing	commit \| commitdiff \| tree
2019-09-23	Eddie Hung	Separate out CREG packing into new pattern, to avoid...	commit \| commitdiff \| tree
2019-09-23	Eddie Hung	Move log_debug("\n") later	commit \| commitdiff \| tree
2019-09-23	Eddie Hung	Move unextend initialisation later	commit \| commitdiff \| tree
2019-09-23	Eddie Hung	Use new port() overload once more	commit \| commitdiff \| tree
2019-09-23	Eddie Hung	Merge remote-tracking branch 'origin/master' into xc7dsp	commit \| commitdiff \| tree
2019-09-21	Clifford Wolf	Merge pull request #1392 from YosysHQ/eddie/fix1391	commit \| commitdiff \| tree
2019-09-21	Eddie Hung	Hell let's add the original #1381 testcase too	commit \| commitdiff \| tree
2019-09-21	Eddie Hung	Revert abc9.cc	commit \| commitdiff \| tree
2019-09-21	Eddie Hung	Add testcase	commit \| commitdiff \| tree
2019-09-21	Eddie Hung	Trim mismatched connection to be same (smallest) size	commit \| commitdiff \| tree
2019-09-21	Eddie Hung	Fix first testcase in #1391	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Grammar	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Use new port/param overload in pmg	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Output pattern matcher items as log_debug()	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	OPMODE is port not param	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Merge remote-tracking branch 'origin/master' into xc7dsp	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Do not run xilinx_dsp_cascadeAB for now	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	WIP for xiinx_dsp_cascadeAB	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Run until convergence	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Cleanup ice40_dsp.pmg	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Cleanup xilinx_dsp	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	More exceptions	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Fix signedness bug	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Update doc	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Add a xilinx_dsp_cascade matcher for PCIN -> PCOUT	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Add an overload for port/param with default value	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Re-add DSP_A_MINWIDTH, remove unnec. opt_expr -fine...	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Revert "Move mul2dsp before wreduce"	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Move mul2dsp before wreduce	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Small cleanup	commit \| commitdiff \| tree
2019-09-20	Clifford Wolf	Merge pull request #1386 from YosysHQ/clifford/fix1360	commit \| commitdiff \| tree
2019-09-20	Clifford Wolf	Fix handling of read_verilog config in AstModule::repro...	commit \| commitdiff \| tree
2019-09-20	Clifford Wolf	Update CHANGELOG	commit \| commitdiff \| tree
2019-09-20	Clifford Wolf	Add "add -mod"	commit \| commitdiff \| tree
2019-09-20	Clifford Wolf	Merge pull request #1384 from YosysHQ/clifford/fix1381	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Disable support for SB_MAC16 reset since it is async	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	SB_MAC16 ffCD to not pack same as ffO	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Add more complicated macc testcase	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Clarify	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Update doc for ice40_dsp	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Tidy up, fix undriven	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Add an index	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	$__ABC_REG to have WIDTH parameter	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Fix DSP48E1 timing by breaking P path if MREG or PREG	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Revert "Different approach to timing"	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Different approach to timing	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Fix width of D	commit \| commitdiff \| tree
2019-09-20	Eddie Hung	Add mac.sh and macc_tb.v for testing	commit \| commitdiff \| tree
2019-09-19	Eddie Hung	Suppress $anyseq warnings	commit \| commitdiff \| tree
2019-09-19	Eddie Hung	Use ID() macro	commit \| commitdiff \| tree
2019-09-19	Eddie Hung	Use (* techmap_autopurge *) to suppress techmap warnings	commit \| commitdiff \| tree
2019-09-19	Eddie Hung	D is 25 bits not 24 bits wide	commit \| commitdiff \| tree
2019-09-19	Eddie Hung	Merge remote-tracking branch 'origin/clifford/fix1381...	commit \| commitdiff \| tree
2019-09-19	Eddie Hung	When two boxes connect to each other, need not be a...	commit \| commitdiff \| tree
2019-09-19	Eddie Hung	Re-enable sign extension for C input	commit \| commitdiff \| tree
2019-09-19	Eddie Hung	synth_xilinx to infer DSPs for Y_WIDTH >= 9 and [AB...	commit \| commitdiff \| tree
2019-09-19	Eddie Hung	Tidy up synth_ice40, only restrict DSP_B_MINWIDTH=2	commit \| commitdiff \| tree
2019-09-19	Eddie Hung	Do not perform width-checks for DSP48E1 which is much...	commit \| commitdiff \| tree
2019-09-19	Eddie Hung	Remove TODO as check should not be necessary	commit \| commitdiff \| tree
2019-09-19	Eddie Hung	Revert index to select	commit \| commitdiff \| tree
2019-09-19	Eddie Hung	Cleanup xilinx_dsp too	commit \| commitdiff \| tree
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