gem5.git
2013-03-03 Blake Hechtman... ruby: fixes functional writes to RubyRequest
2013-03-03 Nilay Vaishsim: remove duplicate check on stack size
2013-03-01 Andreas Hanssonmem: Add check if SimpleDRAM nextReqEvent is scheduled
2013-03-01 Andreas Hanssonmem: Add a method to build multi-channel DRAM configura...
2013-03-01 Andreas Hanssonstats: Update stats to reflect SimpleDRAM changes
2013-03-01 Andreas Hanssonmem: SimpleDRAM variable naming and whitespace fixes
2013-03-01 Andreas Hanssonmem: Add support for multi-channel DRAM configurations
2013-03-01 Andreas Hanssonmem: Merge interleaved ranges when creating backing...
2013-03-01 Andreas Hanssonmem: Merge ranges in bus before passing them on
2013-02-28 Dibakar Gope... ruby: mesi coherence protocol: invalidate lock
2013-02-20 Ali Saidiconfig: Fix --prog-interval command line option
2013-02-20 Nilay Vaishslicc: remove unused variable message_buffer_names
2013-02-20 Nilay Vaishruby: remove unused variable m_print_config in class...
2013-02-19 Andreas Hanssonmem: Fix sender state bug and delay popping
2013-02-19 Ali Saidistats: more zizzer stats fun
2013-02-19 Andreas Hanssonscons: Fix warnings issued by clang 3.2svn (XCode 4.6)
2013-02-19 Andreas Hanssonscons: Unify the flags shared by gcc and clang
2013-02-19 Andreas Hanssonscons: Add warning delete with non-virtual destructor
2013-02-19 Andreas Hanssonscons: Add warning for missing declarations
2013-02-19 Andreas Hanssonscons: Add warning for overloaded virtual functions
2013-02-19 Andreas Hanssonscons: Add warning for overloaded virtual functions
2013-02-19 Andreas Hanssonscons: Add warning for missing field initializers
2013-02-19 Andreas Hanssonscons: Fix up numerous warnings about name shadowing
2013-02-19 Andreas Hanssonmem: Enforce strict use of busFirst- and busLastWordTime
2013-02-19 Andreas Hanssonmem: Change accessor function names to match the port...
2013-02-19 Andreas Hanssonmem: Make packet bus-related time accounting relative
2013-02-19 Andreas Hanssonmem: Add deferred packet class to prefetcher
2013-02-19 Andreas Hanssonsim: Make clock private and access using clockPeriod()
2013-02-19 Andreas Hanssonx86: Move APIC clock divider to Python
2013-02-19 Sascha Bischoffmem: Fix SenderState related cache deadlock
2013-02-19 Andreas Hanssonmem: Add predecessor to SenderState base class
2013-02-19 Andreas Hanssonbase: Fix a bug in the address interleaving
2013-02-19 Andreas Hanssonmem: Ensure trace captures packet fields before forwarding
2013-02-15 Anthony Gutierrezoptions: add command line option for dtb file
2013-02-15 Anthony Gutierrezloader: add a flattened device tree blob (dtb) object
2013-02-15 Anthony Gutierrezext lib: add libfdt to enable flattened device tree...
2013-02-15 Ali Saidistats: update regressions for o3 changes in renaming...
2013-02-15 Mrinmoy Ghosharm: fix a page table walker issue where a page could...
2013-02-15 Andreas Sandbergcpu: Document exec trace flags
2013-02-15 Andreas Sandbergdev: Use the correct return type for disk offsets
2013-02-15 Geoffrey Blakecpu: Avoid duplicate entries in tracking structures...
2013-02-15 Geoffrey Blakecpu: Fix rename mis-handling serializing instructions...
2013-02-15 Chris EmmonsARM: Postpones creation of framebuffer output file...
2013-02-15 Andreas Hanssonmem: Tighten up cache constness and scoping
2013-02-15 Sascha Bischoffbase: Add warn() and inform() to m5.utils for use from...
2013-02-15 Matt Horsnello3: fix tick used for renaming and issue with range...
2012-10-25 Andreas Sandbergarm: Don't export private GIC methods
2012-10-25 Andreas Sandbergarm: Create a GIC base class and make the PL390 derive...
2013-02-15 Andreas Sandbergsim: Add a system-global option to bypass caches
2013-02-15 Andreas Sandbergcpu: Refactor memory system checks
2013-02-15 Andreas Sandbergconfig: Remove O3 dependencies
2013-02-15 Andreas Sandbergconfig: Move CPU handover logic to m5.switchCpus()
2013-02-15 Andreas Sandbergconfig: Cleanup CPU configuration
2013-02-15 Andreas Sandbergcpu: Make checker CPUs inherit from CheckerCPU in the...
2013-02-15 Andreas Sandbergcpu: Add CPU metadata om the Python classes
2013-02-15 Ali Saidiarm: fix some fp comparisons that worked by accident.
2013-02-15 Ali Saidicpu: include set in o3/commit_impl.
2013-02-15 Ali SaidiARM: Fix an issue with clang generating wrong code.
2013-02-15 Ali Saidicpu: fix case with o3 cpu blocking and unblocking decod...
2013-02-15 Ali Saidicpu: Fix a livelock in the o3 cpu.
2013-02-10 Andreas Sandbergbase: Add support for newer versions of IPython
2013-02-14 Andreas HanssonRuby: Fix compilation errors on gcc 4.7 and clang 3.2
2013-02-11 Nilay Vaishregressions: update stats due to changes to ruby
2013-02-11 Nilay Vaishruby: MI protocol: add a missing transition
2013-02-11 Nilay Vaishruby: enable multiple clock domains
2013-02-11 Nilay Vaishruby: replace Time with Cycles (final patch in the...
2013-02-11 Nilay Vaishruby: replace Time with Cycles in garnet fixed and...
2013-02-11 Nilay Vaishruby: replace Time with Tick in replacement policy...
2013-02-11 Nilay Vaishruby: convert block size, memory size to unsigned
2013-02-11 Nilay Vaishruby: replace Time with Cycles in MessageBuffer
2013-02-11 Nilay Vaishruby: replace Time with Cycles in Memory Controller
2013-02-11 Nilay Vaishruby: Replace Time with Cycles in SequencerMessage
2013-02-11 Nilay Vaishruby: replace Time with Cycles in Message class
2013-02-11 Nilay Vaishruby: replaces Time with Cycles in many places
2013-02-11 Nilay Vaishbase: add some mathematical operators to Cycles class
2013-02-11 Nilay Vaishruby: modifies histogram add() function
2013-02-11 Nilay Vaishruby: record fully busy cycle with in the controller
2013-02-10 Andreas Sandbergbase: Fix broken IPython argument handling
2013-02-10 Andreas Sandbergconfig: Don't call sys.exit in interactive mode in...
2013-02-01 Nilay Vaishsim: remove unused struct priority_compare
2013-01-31 Nilay Vaishruby: correct computation of number of bits required...
2013-01-31 Andreas Hanssonmem: Add comments for the DRAM address decoding
2013-01-31 Andreas Hanssonstats: Update stats for regressions using SimpleDDR3
2013-01-31 Andreas Hanssonmem: Add DDR3 and LPDDR2 DRAM controller configurations
2013-01-31 Ani Udipimem: Add tTAW and tFAW to the SimpleDRAM model
2013-01-31 Andreas Hanssonmem: Separate out the different cases for DRAM bus...
2013-01-29 Anthony Gutierrezcache: remove drainManager because it's not used
2013-01-28 Nilay Vaishmerged 798c2cec8e37 and e96ff45795bc
2013-01-28 Andreas Hanssonstats: Fix naming (BPredUnit to branchPred) for 20...
2013-01-28 Nilay Vaishruby: remove get_time()
2013-01-28 Nilay Vaishruby: remove call to curCycle in panic()
2013-01-24 Nilay Vaishregressions: update stats due to branch predictor changes
2013-01-24 Nilay Vaish... branch predictor: move out of o3 and inorder cpus
2013-01-22 Andrea Pellegrinio3 cpu: fix zero reg problem
2013-01-22 Nilay Vaishx86, cpu: corrects 270c9a75e91f, take over decoder...
2013-01-21 Andreas Hanssonscons: Disable protobuf if pkg-config and CheckLib...
2013-01-19 Joel HestnessO3 IEW: Make incrWb and decrWb clearer
2013-01-17 Nilay Vaishruby: remove calls to g_system_ptr->getTime()
2013-01-15 Nilay Vaishx86 regressions: updates due to new instructions and...
2013-01-15 Nilay Vaishx86 cpuid: enable clflush
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