microwatt.git
2020-06-05 Paul Mackerrasdecode1: Make ld/std and lwa not be single-issue
2020-06-05 Paul MackerrasMerge pull request #191 from ozbenh/litedram
2020-06-05 Benjamin Herrenschmidtlitedram: Make the L2 twice as tall
2020-06-05 Paul Mackerrascore: Do addpcis using the main adder (#189)
2020-06-05 Benjamin Herrenschmidtlitedram: Remove old "VexRiscV" based initializations
2020-06-05 Paul MackerrasMerge pull request #183 from shawnanastasio/addpcis
2020-06-05 Benjamin Herrenschmidtlitedram: Update to latest LiteX/LiteDRAM version
2020-06-05 Benjamin Herrenschmidtlitedram: Test bench
2020-06-05 Benjamin Herrenschmidtlitedram: Add an L2 cache with store queue
2020-06-05 Benjamin Herrenschmidtlitedram: Add support for booting without BRAM
2020-06-05 Benjamin Herrenschmidtlitedram: Add simulation support
2020-06-04 Paul MackerrasMerge pull request #185 from ozbenh/misc
2020-06-04 Michael NeulingMerge pull request #188 from ozbenh/openocd-tweaks
2020-06-04 Benjamin Herrenschmidtflash-arty: Add support for specifying the file type
2020-06-04 Benjamin Herrenschmidtflash-arty: Support hex values for address
2020-06-03 Paul MackerrasMerge pull request #168 from shenki/flash-arty
2020-06-02 Benjamin Herrenschmidtdcache: Rework RAM wrapper to synthetize better on...
2020-06-02 Benjamin Herrenschmidtbin2hex: Make sure to generate little endian files
2020-06-02 Benjamin Herrenschmidtmw_debug: Fix memory overflow with "sim" backend
2020-06-02 Anton BlanchardMerge pull request #178 from antonblanchard/intercon
2020-06-02 Anton BlanchardMerge pull request #184 from antonblanchard/verific
2020-05-26 Michael NeulingDelete bit rotted verific script
2020-05-26 Shawn AnastasioAdd a new misc test suite with addpcis tests
2020-05-26 Shawn AnastasioImplement the addpcis instruction
2020-05-25 Benjamin Herrenschmidtlitedram: Split the init memory from the main wrapper
2020-05-25 Benjamin Herrenschmidtirq: Simplify xics->core irq input
2020-05-25 Benjamin Herrenschmidtsoc: Rework interconnect
2020-05-25 Benjamin Herrenschmidtsw: Add full memory map to .h and use it for litedram...
2020-05-23 Anton BlanchardMerge pull request #181 from antonblanchard/Makefile...
2020-05-23 Anton BlanchardPass clock frequency to UART sim wrapper
2020-05-21 Anton BlanchardMerge pull request #180 from antonblanchard/Makefile...
2020-05-20 Anton BlanchardA little less shouting in the Makefile
2020-05-20 Anton BlanchardFix the simulated DMI
2020-05-20 Anton BlanchardExit cleanly from testbench on success
2020-05-20 Anton BlanchardMerge Makefile and Makefile.synth
2020-05-20 Anton BlanchardAdd Makefile command line variables to enable docker...
2020-05-20 Anton BlanchardRework Makefile
2020-05-19 Anton BlanchardMerge pull request #179 from antonblanchard/yosys-verilator
2020-05-19 Anton BlanchardImprove make clean
2020-05-19 Anton BlanchardAdd yosys/verilator support
2020-05-19 Anton BlanchardMerge pull request #171 from shenki/mw-debug-features
2020-05-19 Anton BlanchardMerge pull request #173 from Jbalkind/core-vcs-syntax
2020-05-19 Joel Stanleymw_debug: Add README
2020-05-19 Joel Stanleymw_debug: Add usage text
2020-05-19 Joel Stanleymw_debug: Add CFLAGS and fix warnings
2020-05-19 Anton BlanchardMerge pull request #177 from antonblanchard/litedram
2020-05-19 Anton BlanchardMerge branch 'master' into litedram
2020-05-19 Anton BlanchardMerge pull request #176 from antonblanchard/console...
2020-05-19 Anton BlanchardMerge pull request #175 from antonblanchard/yosys-fixes-2
2020-05-19 Jonathan BalkindChanges for compilation with VCS:
2020-05-19 Anton BlanchardFix yosys build after MMU merge
2020-05-19 Anton BlanchardMerge pull request #174 from antonblanchard/yosys-fixes
2020-05-19 Anton BlanchardSome yosys fixes
2020-05-18 Anton BlanchardMerge pull request #169 from paulusmack/mmu
2020-05-16 Benjamin Herrenschmidtlitedram: Regenerate
2020-05-16 Benjamin Herrenschmidtsoc/core: Add reset latches
2020-05-16 Benjamin Herrenschmidtarty/nexys: Rework reset with litedram
2020-05-16 Benjamin Herrenschmidtsoc_reset: Use counters, add synchronizers
2020-05-16 Benjamin Herrenschmidtlitedram: Forward system reset signal
2020-05-16 Benjamin Herrenschmidtlitedram: Remove init delays
2020-05-16 Benjamin Herrenschmidtlitedram: Update to new LiteX/LiteDRAM version
2020-05-15 Paul Mackerrasdcache: Fix bug in store hit after dcbz case
2020-05-15 Benjamin Herrenschmidtpp_soc_uart: Fix rx synchronizers and ensure stable...
2020-05-15 Benjamin Herrenschmidtpp_fifo: Fix full fifo losing all data on simultaneous...
2020-05-15 Benjamin HerrenschmidtMakefile: Improve clean a bit
2020-05-15 Benjamin Herrenschmidtconsole: Remove putstr()
2020-05-15 Benjamin Herrenschmidtconsole: Move console files
2020-05-15 Benjamin Herrenschmidtconsole: Replace putstr with puts
2020-05-14 Benjamin Herrenschmidtconsole: Improve putchar(), add puts()
2020-05-14 Paul Mackerrassoc: Work around compile error with ghdl 0.37-dev
2020-05-14 Paul MackerrasMerge branch 'mmu'
2020-05-14 Anton BlanchardMerge pull request #170 from antonblanchard/litedram
2020-05-09 Joel StanleyAdd script for writing to flash on arty
2020-05-09 Benjamin Herrenschmidtlitedram: Use 32-bit CSR bus
2020-05-09 Benjamin Herrenschmidtlitedram: Add support for Microwatt-initialized controller
2020-05-08 Benjamin Herrenschmidthello_world: Use new headers and frequency from syscon
2020-05-08 Benjamin Herrenschmidtlitedram: Improve sdram init boot messages
2020-05-08 Benjamin HerrenschmidtAdd microwatt_soc.h and io.h include file
2020-05-08 Benjamin Herrenschmidtsyscon: Add syscon registers
2020-05-08 Benjamin Herrenschmidtfpga: Hookup nexys-video to litedram
2020-05-08 Benjamin Herrenschmidtfpga: Hookup Arty to litedram
2020-05-08 Paul MackerrasMMU: Implement reading of the process table
2020-05-08 Paul Mackerrastests/mmu: Add a test of PTE refetching on permission...
2020-05-08 Paul Mackerrastests/mmu: Add a test for dcbz with translation on
2020-05-08 Paul MackerrasImplement slbia as a dTLB/iTLB flush
2020-05-08 Paul MackerrasDecode tlbiel as tlbie
2020-05-08 Paul Mackerrastests/privileged: Update for instruction translation
2020-05-08 Paul Mackerrastests: mmu: Add tests for instruction translation
2020-05-08 Paul MackerrasMMU: Do radix page table walks on iTLB misses
2020-05-08 Paul MackerrasAdd TLB to icache
2020-05-08 Paul Mackerrastests: Add a test for the MMU radix page table walks
2020-05-08 Paul MackerrasMMU: Remove software-loaded dTLB mode
2020-05-08 Paul MackerrasMMU: Refetch PTE on access fault
2020-05-08 Paul MackerrasMMU: Implement data segment interrupts
2020-05-08 Paul MackerrasMMU: Implement radix page table machinery
2020-05-08 Paul MackerrasAdd framework for implementing an MMU
2020-05-08 Paul MackerrasImplement access permission checks
2020-05-08 Paul MackerrasImplement data storage interrupts
2020-05-08 Paul Mackerrasdcache: Implement data TLB
2020-05-08 Paul MackerrasPass mtspr/mfspr to MMU-related SPRs down to loadstore1
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