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yosys.git
2020-12-01
Claire Xen
Merge pull request #2463 from georgerennie/fix_verilog_...
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2020-12-01
Miodrag Milanović
Merge pull request #2460 from pepijndevos/simple-gowin
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2020-12-01
georgerennie
Fix SYNTHESIS always being defined in Verilog frontend
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2020-11-30
Pepijn de Vos
add -noalu and -json option for apicula
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2020-11-26
Julius Roob
Return correct modname when found in cache.
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2020-11-26
Gabriel Somlo
fixup over commit 829b5cca to re-enable ABCEXTERNAL...
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2020-11-26
Gabriel Somlo
Add #include needed to build with gcc-11
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2020-11-26
Yosys Bot
Bump version
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2020-11-25
whitequark
Merge pull request #2452 from whitequark/rtlil-remove...
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2020-11-25
Robert Baruch
Further juggles the wording of "character".
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2020-11-25
Robert Baruch
Clarifies how character encodings work.
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2020-11-25
Miodrag Milanović
Merge pull request #2453 from YosysHQ/mmicko/verilog_as...
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2020-11-25
Robert Baruch
Clarifies whitespace and eol.
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2020-11-25
Robert Baruch
Cleans up doublequotes
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2020-11-25
Robert Baruch
Clarifies use of integers, and character set.
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2020-11-25
Miodrag Milanovic
Add verilog backend option for simple_lhs
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2020-11-25
Robert Baruch
Clarifies processes, corrects some attributes
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2020-11-25
whitequark
rtlil: remove dotted identifiers.
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2020-11-25
Miodrag Milanovic
generate only simple assignments in verilog backend
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2020-11-25
Claire Xen
Merge pull request #2133 from dh73/nodev_head
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2020-11-25
Robert Baruch
Refactors for attributes.
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2020-11-25
whitequark
Merge pull request #2442 from cr1901/sccache
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2020-11-25
whitequark
Merge pull request #2450 from nitz/sim-vcd-filename
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2020-11-25
William D....
Makefile: Update ABCREV to bring in sccache fixes.
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2020-11-25
Yosys Bot
Bump version
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2020-11-24
Robert Baruch
Cleans up some descriptions and syntax
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2020-11-24
Chris Dailey
Add rewrite_filename for sim -vcd argument.
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2020-11-24
whitequark
Merge pull request #2428 from whitequark/check-processes
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2020-11-24
Miodrag Milanović
Merge pull request #2448 from nitz/tcl-script-documenta...
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2020-11-24
Miodrag Milanović
Merge pull request #2295 from epfl-vlsc/firrtl_blackbox...
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2020-11-24
nitz
tcl -h message only if YOSYS_ENABLE_TCL defined.
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2020-11-23
Sahand Kashani
Formatting fixes
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2020-11-23
Robert Baruch
Adds missing "end" and eol to module.
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2020-11-23
Robert Baruch
Update to Values #2
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2020-11-23
Robert Baruch
Update to Values section
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2020-11-22
Robert Baruch
Adds appendix on RTLIL text format
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2020-11-21
Yosys Bot
Bump version
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2020-11-20
Miodrag Milanović
Merge pull request #2443 from YosysHQ/dave/nexus-mult...
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2020-11-20
David Shah
nexus: DSP inference support
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2020-11-19
William D....
Makefile: Add disabled-by-default ENABLE_SCCACHE config...
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2020-11-19
Yosys Bot
Bump version
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2020-11-18
Miodrag Milanović
Merge pull request #2441 from YosysHQ/dave/nexus_dsp_sim
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2020-11-18
David Shah
nexus: Add DSP simulation model
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2020-11-18
Miodrag Milanovic
Fix duplicated parameter name typo
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2020-11-17
Yosys Bot
Bump version
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2020-11-16
William Woodruff
backends/blif: Remove unused vector of strings (#2420)
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2020-11-16
Miodrag Milanović
Merge pull request #2438 from kbeckmann/gowin_rpll
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2020-11-11
Konrad Beckmann
synth_gowin: Add rPLL blackbox
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2020-11-11
Yosys Bot
Bump version
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2020-11-10
Miodrag Milanović
Merge pull request #2433 from YosysHQ/paths_as_globals
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2020-11-08
Yosys Bot
Bump version
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2020-11-07
whitequark
Merge pull request #2414 from zeldin/abc-depend-clang-fix
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2020-11-07
Marcus Comstedt
Prevent CXXFLAGS from leaking to abc Makefile
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2020-11-07
Miodrag Milanović
Merge pull request #2432 from Xiretza/nexus-tests
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2020-11-06
Miodrag Milanovic
Expose abc and data paths as globals
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2020-11-03
whitequark
check: add support for processes.
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2020-11-03
whitequark
check: reformat log/help text to match most other passes
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2020-11-03
Yosys Bot
Bump version
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2020-11-02
whitequark
Merge pull request #2426 from whitequark/cxxrtl-auto-top
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2020-11-02
whitequark
cxxrtl: run `hierarchy -auto-top` if no top module...
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2020-11-02
Yosys Bot
Bump version
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2020-11-01
whitequark
Merge pull request #2425 from whitequark/cxxrtl-meminit...
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2020-11-01
whitequark
cxxrtl: don't assert on non-constant $meminit inputs.
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2020-11-01
whitequark
Merge pull request #2424 from whitequark/cxxrtl-multipl...
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2020-11-01
whitequark
cxxrtl: don't assert on wires with multiple drivers.
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2020-11-01
Yosys Bot
Bump version
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2020-10-31
whitequark
Merge pull request #2416 from QuantamHD/master
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2020-10-31
Yosys Bot
Bump version
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2020-10-30
Miodrag Milanovic
Update verific version
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2020-10-29
Xiretza
Update nexus arch tests to new harness
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2020-10-29
Ethan Mahintorabi
This patch adds support for defining the ABC location...
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2020-10-25
Yosys Bot
Bump version
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2020-10-24
Marcelina Kościelnicka
xilinx: Fix attributes_test.ys
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2020-10-23
Yosys Bot
Bump version
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2020-10-22
David Shah
nexus: Add make_transp to BRAMs
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2020-10-22
N. Engelhardt
Merge pull request #2403 from nakengelhardt/sim_timescale
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2020-10-22
Marcelina Kościelnicka
memory_dff: Fix needlessly duplicating enable bits.
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2020-10-22
Yosys Bot
Bump version
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2020-10-21
Marcelina Kościelnicka
btor: Use Mem helper.
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2020-10-21
Marcelina Kościelnicka
smt2: Use Mem helper.
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2020-10-21
Marcelina Kościelnicka
verilog_backend: Use Mem helper.
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2020-10-21
Marcelina Kościelnicka
sim: Use Mem helper.
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2020-10-21
Marcelina Kościelnicka
clk2fflogic: Use Mem helper.
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2020-10-21
Marcelina Kościelnicka
opt_mem: Use Mem helpers.
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2020-10-21
Marcelina Kościelnicka
memory_bram: Use Mem helpers.
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2020-10-21
Marcelina Kościelnicka
memory_map: Use Mem helpers.
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2020-10-21
Marcelina Kościelnicka
memory_unpack: Use Mem helpers.
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2020-10-21
Marcelina Kościelnicka
memory_collect: Use Mem helpers.
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2020-10-21
Marcelina Kościelnicka
memory_nordff: Use Mem helpers.
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2020-10-21
Marcelina Kościelnicka
Add new helper structures to represent memories.
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2020-10-21
N. Engelhardt
use strftime instead of put_time for gcc 4.8 compatibility
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2020-10-21
Yosys Bot
Bump version
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2020-10-20
clairexen
Merge pull request #2405 from byuccl/fix_xilinx_cells
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2020-10-20
clairexen
Merge pull request #2404 from YosysHQ/claire/fixrpcargs
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2020-10-20
Yosys Bot
Bump version
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2020-10-19
Jeff Goeders
Move signal declarations to before first use
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2020-10-19
Claire Xenia...
Fix argument handling in connect_rpc
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2020-10-19
Miodrag Milanović
Merge pull request #2397 from daveshah1/nexus
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2020-10-16
N. Engelhardt
wild guessing at the problem because it builds fine...
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2020-10-16
N. Engelhardt
sim -vcd: add date, version, and option for timescale
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